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Merge branch 'depends/rmk/memory_h' into next/cleanup2
There are lots of conflicts between the omap and exynos cleanups and the memory.h remove series. Conflicts: arch/arm/mach-exynos4/mach-smdkc210.c arch/arm/mach-exynos4/mach-smdkv310.c arch/arm/mach-imx/mach-cpuimx27.c arch/arm/mach-omap1/board-ams-delta.c arch/arm/mach-omap1/board-generic.c arch/arm/mach-omap1/board-h2.c arch/arm/mach-omap1/board-h3.c arch/arm/mach-omap1/board-nokia770.c arch/arm/mach-omap1/board-osk.c arch/arm/mach-omap1/board-palmte.c arch/arm/mach-omap1/board-palmtt.c arch/arm/mach-omap1/board-palmz71.c arch/arm/mach-omap1/board-sx1.c arch/arm/mach-omap1/board-voiceblue.c arch/arm/mach-omap1/io.c arch/arm/mach-omap2/board-generic.c arch/arm/mach-omap2/io.c arch/arm/plat-omap/io.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
cfaf8fc5b5
@ -195,7 +195,8 @@ config VECTORS_BASE
|
||||
The base address of exception vectors.
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||||
|
||||
config ARM_PATCH_PHYS_VIRT
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bool "Patch physical to virtual translations at runtime"
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bool "Patch physical to virtual translations at runtime" if EMBEDDED
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default y
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depends on !XIP_KERNEL && MMU
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depends on !ARCH_REALVIEW || !SPARSEMEM
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help
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||||
@ -204,16 +205,25 @@ config ARM_PATCH_PHYS_VIRT
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kernel in system memory.
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This can only be used with non-XIP MMU kernels where the base
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of physical memory is at a 16MB boundary, or theoretically 64K
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for the MSM machine class.
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of physical memory is at a 16MB boundary.
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config ARM_PATCH_PHYS_VIRT_16BIT
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def_bool y
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depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
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Only disable this option if you know that you do not require
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this feature (eg, building a kernel for a single machine) and
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you need to shrink the kernel to the minimal size.
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config NEED_MACH_MEMORY_H
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bool
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help
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This option extends the physical to virtual translation patching
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to allow physical memory down to a theoretical minimum of 64K
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boundaries.
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Select this when mach/memory.h is required to provide special
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definitions for this platform. The need for mach/memory.h should
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be avoided when possible.
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config PHYS_OFFSET
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hex "Physical address of main memory"
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depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
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help
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Please provide the physical address corresponding to the
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location of main memory in your system.
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source "init/Kconfig"
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@ -246,6 +256,7 @@ config ARCH_INTEGRATOR
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select GENERIC_CLOCKEVENTS
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select PLAT_VERSATILE
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select PLAT_VERSATILE_FPGA_IRQ
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select NEED_MACH_MEMORY_H
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help
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Support for ARM's Integrator platform.
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@ -261,6 +272,7 @@ config ARCH_REALVIEW
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select PLAT_VERSATILE_CLCD
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select ARM_TIMER_SP804
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select GPIO_PL061 if GPIOLIB
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select NEED_MACH_MEMORY_H
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help
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This enables support for ARM Ltd RealView boards.
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@ -301,7 +313,6 @@ config ARCH_AT91
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select ARCH_REQUIRE_GPIOLIB
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select HAVE_CLK
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select CLKDEV_LOOKUP
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select ARM_PATCH_PHYS_VIRT if MMU
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help
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This enables support for systems based on the Atmel AT91RM9200,
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AT91SAM9 and AT91CAP9 processors.
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@ -322,6 +333,7 @@ config ARCH_CLPS711X
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bool "Cirrus Logic CLPS711x/EP721x-based"
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select CPU_ARM720T
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select ARCH_USES_GETTIMEOFFSET
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select NEED_MACH_MEMORY_H
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help
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Support for Cirrus Logic 711x/721x based boards.
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@ -362,6 +374,7 @@ config ARCH_EBSA110
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select ISA
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select NO_IOPORT
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select ARCH_USES_GETTIMEOFFSET
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select NEED_MACH_MEMORY_H
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help
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This is an evaluation board for the StrongARM processor available
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from Digital. It has limited hardware on-board, including an
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@ -377,6 +390,7 @@ config ARCH_EP93XX
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select ARCH_REQUIRE_GPIOLIB
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select ARCH_HAS_HOLES_MEMORYMODEL
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select ARCH_USES_GETTIMEOFFSET
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select NEED_MEMORY_H
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help
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This enables support for the Cirrus EP93xx series of CPUs.
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@ -385,6 +399,7 @@ config ARCH_FOOTBRIDGE
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select CPU_SA110
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select FOOTBRIDGE
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select GENERIC_CLOCKEVENTS
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select NEED_MACH_MEMORY_H
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help
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Support for systems based on the DC21285 companion chip
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("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
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@ -434,6 +449,7 @@ config ARCH_IOP13XX
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select PCI
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select ARCH_SUPPORTS_MSI
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select VMSPLIT_1G
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select NEED_MACH_MEMORY_H
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help
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Support for Intel's IOP13XX (XScale) family of processors.
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@ -464,6 +480,7 @@ config ARCH_IXP23XX
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select CPU_XSC3
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select PCI
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select ARCH_USES_GETTIMEOFFSET
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select NEED_MACH_MEMORY_H
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help
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Support for Intel's IXP23xx (XScale) family of processors.
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@ -473,6 +490,7 @@ config ARCH_IXP2000
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select CPU_XSCALE
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select PCI
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select ARCH_USES_GETTIMEOFFSET
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select NEED_MACH_MEMORY_H
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help
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Support for Intel's IXP2400/2800 (XScale) family of processors.
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@ -566,6 +584,7 @@ config ARCH_KS8695
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select CPU_ARM922T
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select ARCH_REQUIRE_GPIOLIB
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select ARCH_USES_GETTIMEOFFSET
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select NEED_MACH_MEMORY_H
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help
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Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
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System-on-Chip devices.
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@ -657,6 +676,7 @@ config ARCH_SHMOBILE
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select SPARSE_IRQ
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select MULTI_IRQ_HANDLER
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select PM_GENERIC_DOMAINS if PM
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select NEED_MACH_MEMORY_H
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help
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Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
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@ -671,6 +691,7 @@ config ARCH_RPC
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select NO_IOPORT
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select ARCH_SPARSEMEM_ENABLE
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select ARCH_USES_GETTIMEOFFSET
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select NEED_MACH_MEMORY_H
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help
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On the Acorn Risc-PC, Linux can support the internal IDE disk and
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CD-ROM interface, serial and parallel port, and the floppy drive.
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@ -689,6 +710,7 @@ config ARCH_SA1100
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select HAVE_SCHED_CLOCK
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select TICK_ONESHOT
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select ARCH_REQUIRE_GPIOLIB
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select NEED_MACH_MEMORY_H
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help
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Support for StrongARM 11x0 based boards.
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@ -778,6 +800,7 @@ config ARCH_S5PV210
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select HAVE_S3C2410_I2C if I2C
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select HAVE_S3C_RTC if RTC_CLASS
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select HAVE_S3C2410_WATCHDOG if WATCHDOG
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select NEED_MACH_MEMORY_H
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help
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Samsung S5PV210/S5PC110 series based systems
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@ -794,6 +817,7 @@ config ARCH_EXYNOS4
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select HAVE_S3C_RTC if RTC_CLASS
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select HAVE_S3C2410_I2C if I2C
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select HAVE_S3C2410_WATCHDOG if WATCHDOG
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select NEED_MACH_MEMORY_H
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help
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Samsung EXYNOS4 series based systems
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@ -805,6 +829,7 @@ config ARCH_SHARK
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select ZONE_DMA
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select PCI
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select ARCH_USES_GETTIMEOFFSET
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select NEED_MACH_MEMORY_H
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help
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||||
Support for the StrongARM based Digital DNARD machine, also known
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as "Shark" (<http://www.shark-linux.de/shark.html>).
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@ -832,6 +857,7 @@ config ARCH_U300
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select CLKDEV_LOOKUP
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select HAVE_MACH_CLKDEV
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select GENERIC_GPIO
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select NEED_MACH_MEMORY_H
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help
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Support for ST-Ericsson U300 series mobile platforms.
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@ -128,6 +128,9 @@ textofs-$(CONFIG_PM_H1940) := 0x00108000
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ifeq ($(CONFIG_ARCH_SA1100),y)
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textofs-$(CONFIG_SA1111) := 0x00208000
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endif
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textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000
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textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000
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textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
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# Machine directory name. This list is sorted alphanumerically
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# by CONFIG_* macro name.
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@ -205,6 +205,13 @@ extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *,
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int dma_mmap_writecombine(struct device *, struct vm_area_struct *,
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void *, dma_addr_t, size_t);
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/*
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* This can be called during boot to increase the size of the consistent
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* DMA region above it's default value of 2MB. It must be called before the
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* memory allocator is initialised, i.e. before any core_initcall.
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*/
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extern void __init init_consistent_dma_size(unsigned long size);
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#ifdef CONFIG_DMABOUNCE
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/*
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@ -17,7 +17,7 @@ struct sys_timer;
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struct machine_desc {
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unsigned int nr; /* architecture number */
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const char *name; /* architecture name */
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unsigned long boot_params; /* tagged list */
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unsigned long atag_offset; /* tagged list (relative) */
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const char **dt_compat; /* array of device tree
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* 'compatible' strings */
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@ -16,9 +16,12 @@
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#include <linux/compiler.h>
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#include <linux/const.h>
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#include <linux/types.h>
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#include <mach/memory.h>
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#include <asm/sizes.h>
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#ifdef CONFIG_NEED_MACH_MEMORY_H
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#include <mach/memory.h>
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#endif
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/*
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* Allow for constants defined here to be used from assembly code
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* by prepending the UL suffix only with actual C code compilation.
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@ -77,16 +80,7 @@
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*/
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#define IOREMAP_MAX_ORDER 24
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/*
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* Size of DMA-consistent memory region. Must be multiple of 2M,
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* between 2MB and 14MB inclusive.
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*/
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#ifndef CONSISTENT_DMA_SIZE
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#define CONSISTENT_DMA_SIZE SZ_2M
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#endif
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#define CONSISTENT_END (0xffe00000UL)
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#define CONSISTENT_BASE (CONSISTENT_END - CONSISTENT_DMA_SIZE)
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#else /* CONFIG_MMU */
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@ -160,7 +154,6 @@
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* so that all we need to do is modify the 8-bit constant field.
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*/
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#define __PV_BITS_31_24 0x81000000
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#define __PV_BITS_23_16 0x00810000
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extern unsigned long __pv_phys_offset;
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#define PHYS_OFFSET __pv_phys_offset
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@ -178,9 +171,6 @@ static inline unsigned long __virt_to_phys(unsigned long x)
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{
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unsigned long t;
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__pv_stub(x, t, "add", __PV_BITS_31_24);
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#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
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__pv_stub(t, t, "add", __PV_BITS_23_16);
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#endif
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return t;
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}
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|
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@ -188,9 +178,6 @@ static inline unsigned long __phys_to_virt(unsigned long x)
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{
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unsigned long t;
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__pv_stub(x, t, "sub", __PV_BITS_31_24);
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#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
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__pv_stub(t, t, "sub", __PV_BITS_23_16);
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#endif
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return t;
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||||
}
|
||||
#else
|
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@ -200,7 +187,11 @@ static inline unsigned long __phys_to_virt(unsigned long x)
|
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#endif
|
||||
|
||||
#ifndef PHYS_OFFSET
|
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#ifdef PLAT_PHYS_OFFSET
|
||||
#define PHYS_OFFSET PLAT_PHYS_OFFSET
|
||||
#else
|
||||
#define PHYS_OFFSET UL(CONFIG_PHYS_OFFSET)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
||||
@ -31,11 +31,7 @@ struct mod_arch_specific {
|
||||
|
||||
/* Add __virt_to_phys patching state as well */
|
||||
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
|
||||
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
|
||||
#define MODULE_ARCH_VERMAGIC_P2V "p2v16 "
|
||||
#else
|
||||
#define MODULE_ARCH_VERMAGIC_P2V "p2v8 "
|
||||
#endif
|
||||
#else
|
||||
#define MODULE_ARCH_VERMAGIC_P2V ""
|
||||
#endif
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
#if defined(CONFIG_DEBUG_ICEDCC)
|
||||
@@ debug using ARM EmbeddedICE DCC channel
|
||||
|
||||
.macro addruart, rp, rv
|
||||
.macro addruart, rp, rv, tmp
|
||||
.endm
|
||||
|
||||
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
|
||||
@ -106,7 +106,7 @@
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
.macro addruart_current, rx, tmp1, tmp2
|
||||
addruart \tmp1, \tmp2
|
||||
addruart \tmp1, \tmp2, \rx
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1
|
||||
moveq \rx, \tmp1
|
||||
|
||||
@ -95,7 +95,7 @@ ENTRY(stext)
|
||||
sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET)
|
||||
add r8, r8, r4 @ PHYS_OFFSET
|
||||
#else
|
||||
ldr r8, =PLAT_PHYS_OFFSET
|
||||
ldr r8, =PHYS_OFFSET @ always constant in this case
|
||||
#endif
|
||||
|
||||
/*
|
||||
@ -234,7 +234,7 @@ __create_page_tables:
|
||||
* This allows debug messages to be output
|
||||
* via a serial console before paging_init.
|
||||
*/
|
||||
addruart r7, r3
|
||||
addruart r7, r3, r0
|
||||
|
||||
mov r3, r3, lsr #20
|
||||
mov r3, r3, lsl #2
|
||||
@ -488,13 +488,8 @@ __fixup_pv_table:
|
||||
add r5, r5, r3 @ adjust table end address
|
||||
add r7, r7, r3 @ adjust __pv_phys_offset address
|
||||
str r8, [r7] @ save computed PHYS_OFFSET to __pv_phys_offset
|
||||
#ifndef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
|
||||
mov r6, r3, lsr #24 @ constant for add/sub instructions
|
||||
teq r3, r6, lsl #24 @ must be 16MiB aligned
|
||||
#else
|
||||
mov r6, r3, lsr #16 @ constant for add/sub instructions
|
||||
teq r3, r6, lsl #16 @ must be 64kiB aligned
|
||||
#endif
|
||||
THUMB( it ne @ cross section branch )
|
||||
bne __error
|
||||
str r6, [r7, #4] @ save to __pv_offset
|
||||
@ -510,20 +505,8 @@ ENDPROC(__fixup_pv_table)
|
||||
.text
|
||||
__fixup_a_pv_table:
|
||||
#ifdef CONFIG_THUMB2_KERNEL
|
||||
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
|
||||
lsls r0, r6, #24
|
||||
lsr r6, #8
|
||||
beq 1f
|
||||
clz r7, r0
|
||||
lsr r0, #24
|
||||
lsl r0, r7
|
||||
bic r0, 0x0080
|
||||
lsrs r7, #1
|
||||
orrcs r0, #0x0080
|
||||
orr r0, r0, r7, lsl #12
|
||||
#endif
|
||||
1: lsls r6, #24
|
||||
beq 4f
|
||||
lsls r6, #24
|
||||
beq 2f
|
||||
clz r7, r6
|
||||
lsr r6, #24
|
||||
lsl r6, r7
|
||||
@ -532,43 +515,25 @@ __fixup_a_pv_table:
|
||||
orrcs r6, #0x0080
|
||||
orr r6, r6, r7, lsl #12
|
||||
orr r6, #0x4000
|
||||
b 4f
|
||||
2: @ at this point the C flag is always clear
|
||||
add r7, r3
|
||||
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
|
||||
ldrh ip, [r7]
|
||||
tst ip, 0x0400 @ the i bit tells us LS or MS byte
|
||||
beq 3f
|
||||
cmp r0, #0 @ set C flag, and ...
|
||||
biceq ip, 0x0400 @ immediate zero value has a special encoding
|
||||
streqh ip, [r7] @ that requires the i bit cleared
|
||||
#endif
|
||||
3: ldrh ip, [r7, #2]
|
||||
b 2f
|
||||
1: add r7, r3
|
||||
ldrh ip, [r7, #2]
|
||||
and ip, 0x8f00
|
||||
orrcc ip, r6 @ mask in offset bits 31-24
|
||||
orrcs ip, r0 @ mask in offset bits 23-16
|
||||
orr ip, r6 @ mask in offset bits 31-24
|
||||
strh ip, [r7, #2]
|
||||
4: cmp r4, r5
|
||||
2: cmp r4, r5
|
||||
ldrcc r7, [r4], #4 @ use branch for delay slot
|
||||
bcc 2b
|
||||
bcc 1b
|
||||
bx lr
|
||||
#else
|
||||
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
|
||||
and r0, r6, #255 @ offset bits 23-16
|
||||
mov r6, r6, lsr #8 @ offset bits 31-24
|
||||
#else
|
||||
mov r0, #0 @ just in case...
|
||||
#endif
|
||||
b 3f
|
||||
2: ldr ip, [r7, r3]
|
||||
b 2f
|
||||
1: ldr ip, [r7, r3]
|
||||
bic ip, ip, #0x000000ff
|
||||
tst ip, #0x400 @ rotate shift tells us LS or MS byte
|
||||
orrne ip, ip, r6 @ mask in offset bits 31-24
|
||||
orreq ip, ip, r0 @ mask in offset bits 23-16
|
||||
orr ip, ip, r6 @ mask in offset bits 31-24
|
||||
str ip, [r7, r3]
|
||||
3: cmp r4, r5
|
||||
2: cmp r4, r5
|
||||
ldrcc r7, [r4], #4 @ use branch for delay slot
|
||||
bcc 2b
|
||||
bcc 1b
|
||||
mov pc, lr
|
||||
#endif
|
||||
ENDPROC(__fixup_a_pv_table)
|
||||
|
||||
@ -820,25 +820,8 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr)
|
||||
|
||||
if (__atags_pointer)
|
||||
tags = phys_to_virt(__atags_pointer);
|
||||
else if (mdesc->boot_params) {
|
||||
#ifdef CONFIG_MMU
|
||||
/*
|
||||
* We still are executing with a minimal MMU mapping created
|
||||
* with the presumption that the machine default for this
|
||||
* is located in the first MB of RAM. Anything else will
|
||||
* fault and silently hang the kernel at this point.
|
||||
*/
|
||||
if (mdesc->boot_params < PHYS_OFFSET ||
|
||||
mdesc->boot_params >= PHYS_OFFSET + SZ_1M) {
|
||||
printk(KERN_WARNING
|
||||
"Default boot params at physical 0x%08lx out of reach\n",
|
||||
mdesc->boot_params);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
tags = phys_to_virt(mdesc->boot_params);
|
||||
}
|
||||
}
|
||||
else if (mdesc->atag_offset)
|
||||
tags = (void *)(PAGE_OFFSET + mdesc->atag_offset);
|
||||
|
||||
#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
|
||||
/*
|
||||
|
||||
@ -12,6 +12,7 @@
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/pm.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
@ -319,6 +320,7 @@ static void at91sam9g45_poweroff(void)
|
||||
static void __init at91sam9g45_map_io(void)
|
||||
{
|
||||
at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE);
|
||||
init_consistent_dma_size(SZ_4M);
|
||||
}
|
||||
|
||||
static void __init at91sam9g45_initialize(void)
|
||||
|
||||
@ -128,8 +128,6 @@
|
||||
#define AT91SAM9G45_EHCI_BASE 0x00800000 /* USB Host controller (EHCI) */
|
||||
#define AT91SAM9G45_VDEC_BASE 0x00900000 /* Video Decoder Controller */
|
||||
|
||||
#define CONSISTENT_DMA_SIZE SZ_4M
|
||||
|
||||
/*
|
||||
* DMA peripheral identifiers
|
||||
* for hardware handshaking interface
|
||||
|
||||
@ -14,7 +14,7 @@
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/at91_dbgu.h>
|
||||
|
||||
.macro addruart, rp, rv
|
||||
.macro addruart, rp, rv, tmp
|
||||
ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address)
|
||||
ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address)
|
||||
.endm
|
||||
|
||||
@ -22,7 +22,6 @@
|
||||
#define __ASM_ARCH_HARDWARE_H
|
||||
|
||||
#include <asm/sizes.h>
|
||||
#include <mach/memory.h>
|
||||
#include <cfg_global.h>
|
||||
#include <mach/csp/mm_io.h>
|
||||
|
||||
@ -31,7 +30,7 @@
|
||||
* *_SIZE is the size of the region
|
||||
* *_BASE is the virtual address
|
||||
*/
|
||||
#define RAM_START PLAT_PHYS_OFFSET
|
||||
#define RAM_START PHYS_OFFSET
|
||||
|
||||
#define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED)
|
||||
#define RAM_BASE PAGE_OFFSET
|
||||
|
||||
@ -1,33 +0,0 @@
|
||||
/*****************************************************************************
|
||||
* Copyright 2005 - 2008 Broadcom Corporation. All rights reserved.
|
||||
*
|
||||
* Unless you and Broadcom execute a separate written software license
|
||||
* agreement governing use of this software, this software is licensed to you
|
||||
* under the terms of the GNU General Public License version 2, available at
|
||||
* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
|
||||
*
|
||||
* Notwithstanding the above, under no circumstances may you combine this
|
||||
* software in any way with any other Broadcom software provided under a
|
||||
* license other than the GPL, without Broadcom's express prior written
|
||||
* consent.
|
||||
*****************************************************************************/
|
||||
|
||||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#include <cfg_global.h>
|
||||
|
||||
/*
|
||||
* Physical vs virtual RAM address space conversion. These are
|
||||
* private definitions which should NOT be used outside memory.h
|
||||
* files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
|
||||
*/
|
||||
|
||||
#define PLAT_PHYS_OFFSET CFG_GLOBAL_RAM_BASE
|
||||
|
||||
/*
|
||||
* Maximum DMA memory allowed is 14M
|
||||
*/
|
||||
#define CONSISTENT_DMA_SIZE (SZ_16M - SZ_2M)
|
||||
|
||||
#endif
|
||||
@ -13,6 +13,7 @@
|
||||
*****************************************************************************/
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
@ -53,4 +54,6 @@ void __init bcmring_map_io(void)
|
||||
{
|
||||
|
||||
iotable_init(bcmring_io_desc, ARRAY_SIZE(bcmring_io_desc));
|
||||
/* Maximum DMA memory allowed is 14M */
|
||||
init_consistent_dma_size(14 << 20);
|
||||
}
|
||||
|
||||
@ -64,7 +64,7 @@ void __init autcpu12_map_io(void)
|
||||
|
||||
MACHINE_START(AUTCPU12, "autronix autcpu12")
|
||||
/* Maintainer: Thomas Gleixner */
|
||||
.boot_params = 0xc0020000,
|
||||
.atag_offset = 0x20000,
|
||||
.map_io = autcpu12_map_io,
|
||||
.init_irq = clps711x_init_irq,
|
||||
.timer = &clps711x_timer,
|
||||
|
||||
@ -55,7 +55,7 @@ static void __init cdb89712_map_io(void)
|
||||
|
||||
MACHINE_START(CDB89712, "Cirrus-CDB89712")
|
||||
/* Maintainer: Ray Lehtiniemi */
|
||||
.boot_params = 0xc0000100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = cdb89712_map_io,
|
||||
.init_irq = clps711x_init_irq,
|
||||
.timer = &clps711x_timer,
|
||||
|
||||
@ -56,7 +56,7 @@ static void __init ceiva_map_io(void)
|
||||
|
||||
MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame")
|
||||
/* Maintainer: Rob Scott */
|
||||
.boot_params = 0xc0000100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ceiva_map_io,
|
||||
.init_irq = clps711x_init_irq,
|
||||
.timer = &clps711x_timer,
|
||||
|
||||
@ -37,7 +37,7 @@ fixup_clep7312(struct machine_desc *desc, struct tag *tags,
|
||||
|
||||
MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
|
||||
/* Maintainer: Nobody */
|
||||
.boot_params = 0xc0000100,
|
||||
.atag_offset = 0x0100,
|
||||
.fixup = fixup_clep7312,
|
||||
.map_io = clps711x_map_io,
|
||||
.init_irq = clps711x_init_irq,
|
||||
|
||||
@ -57,7 +57,7 @@ fixup_edb7211(struct machine_desc *desc, struct tag *tags,
|
||||
|
||||
MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
|
||||
/* Maintainer: Jon McClintock */
|
||||
.boot_params = 0xc0020100, /* 0xc0000000 - 0xc001ffff can be video RAM */
|
||||
.atag_offset = 0x20100, /* 0xc0000000 - 0xc001ffff can be video RAM */
|
||||
.fixup = fixup_edb7211,
|
||||
.map_io = edb7211_map_io,
|
||||
.reserve = edb7211_reserve,
|
||||
|
||||
@ -75,7 +75,6 @@ fortunet_fixup(struct machine_desc *desc, struct tag *tags,
|
||||
|
||||
MACHINE_START(FORTUNET, "ARM-FortuNet")
|
||||
/* Maintainer: FortuNet Inc. */
|
||||
.boot_params = 0x00000000,
|
||||
.fixup = fortunet_fixup,
|
||||
.map_io = clps711x_map_io,
|
||||
.init_irq = clps711x_init_irq,
|
||||
|
||||
@ -14,7 +14,7 @@
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/hardware/clps7111.h>
|
||||
|
||||
.macro addruart, rp, rv
|
||||
.macro addruart, rp, rv, tmp
|
||||
#ifndef CONFIG_DEBUG_CLPS711X_UART2
|
||||
mov \rp, #0x0000 @ UART1
|
||||
#else
|
||||
|
||||
@ -89,7 +89,7 @@ static void __init p720t_map_io(void)
|
||||
|
||||
MACHINE_START(P720T, "ARM-Prospector720T")
|
||||
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
|
||||
.boot_params = 0xc0000100,
|
||||
.atag_offset = 0x100,
|
||||
.fixup = fixup_p720t,
|
||||
.map_io = p720t_map_io,
|
||||
.init_irq = clps711x_init_irq,
|
||||
|
||||
@ -197,7 +197,7 @@ static void __init cns3420_map_io(void)
|
||||
}
|
||||
|
||||
MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
|
||||
.boot_params = 0x00000100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = cns3420_map_io,
|
||||
.init_irq = cns3xxx_init_irq,
|
||||
.timer = &cns3xxx_timer,
|
||||
|
||||
@ -10,7 +10,7 @@
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
.macro addruart,rp,rv
|
||||
.macro addruart,rp,rv,tmp
|
||||
mov \rp, #0x00009000
|
||||
orr \rv, \rp, #0xf0000000 @ virtual base
|
||||
orr \rp, \rp, #0x10000000
|
||||
|
||||
@ -1,26 +0,0 @@
|
||||
/*
|
||||
* Copyright 2003 ARM Limited
|
||||
* Copyright 2008 Cavium Networks
|
||||
*
|
||||
* This file is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License, Version 2, as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_MEMORY_H
|
||||
#define __MACH_MEMORY_H
|
||||
|
||||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#define __phys_to_bus(x) ((x) + PHYS_OFFSET)
|
||||
#define __bus_to_phys(x) ((x) - PHYS_OFFSET)
|
||||
|
||||
#define __virt_to_bus(v) __phys_to_bus(__virt_to_phys(v))
|
||||
#define __bus_to_virt(b) __phys_to_virt(__bus_to_phys(b))
|
||||
#define __pfn_to_bus(p) __phys_to_bus(__pfn_to_phys(p))
|
||||
#define __bus_to_pfn(b) __phys_to_pfn(__bus_to_phys(b))
|
||||
|
||||
#endif
|
||||
@ -676,7 +676,7 @@ static void __init da830_evm_map_io(void)
|
||||
}
|
||||
|
||||
MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
|
||||
.boot_params = (DA8XX_DDR_BASE + 0x100),
|
||||
.atag_offset = 0x100,
|
||||
.map_io = da830_evm_map_io,
|
||||
.init_irq = cp_intc_init,
|
||||
.timer = &davinci_timer,
|
||||
|
||||
@ -1291,7 +1291,7 @@ static void __init da850_evm_map_io(void)
|
||||
}
|
||||
|
||||
MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
|
||||
.boot_params = (DA8XX_DDR_BASE + 0x100),
|
||||
.atag_offset = 0x100,
|
||||
.map_io = da850_evm_map_io,
|
||||
.init_irq = cp_intc_init,
|
||||
.timer = &davinci_timer,
|
||||
|
||||
@ -351,7 +351,7 @@ static __init void dm355_evm_init(void)
|
||||
}
|
||||
|
||||
MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
|
||||
.boot_params = (0x80000100),
|
||||
.atag_offset = 0x100,
|
||||
.map_io = dm355_evm_map_io,
|
||||
.init_irq = davinci_irq_init,
|
||||
.timer = &davinci_timer,
|
||||
|
||||
@ -270,7 +270,7 @@ static __init void dm355_leopard_init(void)
|
||||
}
|
||||
|
||||
MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
|
||||
.boot_params = (0x80000100),
|
||||
.atag_offset = 0x100,
|
||||
.map_io = dm355_leopard_map_io,
|
||||
.init_irq = davinci_irq_init,
|
||||
.timer = &davinci_timer,
|
||||
|
||||
@ -612,7 +612,7 @@ static __init void dm365_evm_init(void)
|
||||
}
|
||||
|
||||
MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
|
||||
.boot_params = (0x80000100),
|
||||
.atag_offset = 0x100,
|
||||
.map_io = dm365_evm_map_io,
|
||||
.init_irq = davinci_irq_init,
|
||||
.timer = &davinci_timer,
|
||||
|
||||
@ -712,7 +712,7 @@ static __init void davinci_evm_init(void)
|
||||
|
||||
MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
|
||||
/* Maintainer: MontaVista Software <source@mvista.com> */
|
||||
.boot_params = (DAVINCI_DDR_BASE + 0x100),
|
||||
.atag_offset = 0x100,
|
||||
.map_io = davinci_evm_map_io,
|
||||
.init_irq = davinci_irq_init,
|
||||
.timer = &davinci_timer,
|
||||
|
||||
@ -792,7 +792,7 @@ static __init void evm_init(void)
|
||||
}
|
||||
|
||||
MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
|
||||
.boot_params = (0x80000100),
|
||||
.atag_offset = 0x100,
|
||||
.map_io = davinci_map_io,
|
||||
.init_irq = davinci_irq_init,
|
||||
.timer = &davinci_timer,
|
||||
@ -801,7 +801,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
|
||||
.boot_params = (0x80000100),
|
||||
.atag_offset = 0x100,
|
||||
.map_io = davinci_map_io,
|
||||
.init_irq = davinci_irq_init,
|
||||
.timer = &davinci_timer,
|
||||
|
||||
@ -566,7 +566,7 @@ static void __init mityomapl138_map_io(void)
|
||||
}
|
||||
|
||||
MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
|
||||
.boot_params = (DA8XX_DDR_BASE + 0x100),
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mityomapl138_map_io,
|
||||
.init_irq = cp_intc_init,
|
||||
.timer = &davinci_timer,
|
||||
|
||||
@ -272,7 +272,7 @@ static __init void davinci_ntosd2_init(void)
|
||||
|
||||
MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
|
||||
/* Maintainer: Neuros Technologies <neuros@groups.google.com> */
|
||||
.boot_params = (DAVINCI_DDR_BASE + 0x100),
|
||||
.atag_offset = 0x100,
|
||||
.map_io = davinci_ntosd2_map_io,
|
||||
.init_irq = davinci_irq_init,
|
||||
.timer = &davinci_timer,
|
||||
|
||||
@ -338,7 +338,7 @@ static void __init omapl138_hawk_map_io(void)
|
||||
}
|
||||
|
||||
MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
|
||||
.boot_params = (DA8XX_DDR_BASE + 0x100),
|
||||
.atag_offset = 0x100,
|
||||
.map_io = omapl138_hawk_map_io,
|
||||
.init_irq = cp_intc_init,
|
||||
.timer = &davinci_timer,
|
||||
|
||||
@ -151,7 +151,7 @@ static __init void davinci_sffsdr_init(void)
|
||||
|
||||
MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
|
||||
/* Maintainer: Hugo Villeneuve hugo.villeneuve@lyrtech.com */
|
||||
.boot_params = (DAVINCI_DDR_BASE + 0x100),
|
||||
.atag_offset = 0x100,
|
||||
.map_io = davinci_sffsdr_map_io,
|
||||
.init_irq = davinci_irq_init,
|
||||
.timer = &davinci_timer,
|
||||
|
||||
@ -277,7 +277,7 @@ console_initcall(tnetv107x_evm_console_init);
|
||||
#endif
|
||||
|
||||
MACHINE_START(TNETV107X, "TNETV107X EVM")
|
||||
.boot_params = (TNETV107X_DDR_BASE + 0x100),
|
||||
.atag_offset = 0x100,
|
||||
.map_io = tnetv107x_init,
|
||||
.init_irq = cp_intc_init,
|
||||
.timer = &davinci_timer,
|
||||
|
||||
@ -12,6 +12,7 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/davinci_emac.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
|
||||
#include <asm/tlb.h>
|
||||
#include <asm/mach/map.h>
|
||||
@ -86,6 +87,8 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
|
||||
iotable_init(davinci_soc_info.io_desc,
|
||||
davinci_soc_info.io_desc_num);
|
||||
|
||||
init_consistent_dma_size(14 << 20);
|
||||
|
||||
/*
|
||||
* Normally devicemaps_init() would flush caches and tlb after
|
||||
* mdesc->map_io(), but we must also do it here because of the CPU
|
||||
|
||||
@ -19,7 +19,7 @@
|
||||
#include <asm/proc-fns.h>
|
||||
|
||||
#include <mach/cpuidle.h>
|
||||
#include <mach/memory.h>
|
||||
#include <mach/ddr2.h>
|
||||
|
||||
#define DAVINCI_CPUIDLE_MAX_STATES 2
|
||||
|
||||
|
||||
4
arch/arm/mach-davinci/include/mach/ddr2.h
Normal file
4
arch/arm/mach-davinci/include/mach/ddr2.h
Normal file
@ -0,0 +1,4 @@
|
||||
#define DDR2_SDRCR_OFFSET 0xc
|
||||
#define DDR2_SRPD_BIT (1 << 23)
|
||||
#define DDR2_MCLKSTOPEN_BIT (1 << 30)
|
||||
#define DDR2_LPMODEN_BIT (1 << 31)
|
||||
@ -18,56 +18,50 @@
|
||||
|
||||
#include <linux/serial_reg.h>
|
||||
|
||||
#include <asm/memory.h>
|
||||
|
||||
#include <mach/serial.h>
|
||||
|
||||
#define UART_SHIFT 2
|
||||
|
||||
#define davinci_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
|
||||
#define davinci_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
|
||||
|
||||
.pushsection .data
|
||||
davinci_uart_phys: .word 0
|
||||
davinci_uart_virt: .word 0
|
||||
.popsection
|
||||
|
||||
.macro addruart, rp, rv
|
||||
.macro addruart, rp, rv, tmp
|
||||
|
||||
/* Use davinci_uart_phys/virt if already configured */
|
||||
10: mrc p15, 0, \rp, c1, c0
|
||||
tst \rp, #1 @ MMU enabled?
|
||||
ldreq \rp, =davinci_uart_v2p(davinci_uart_phys)
|
||||
ldrne \rp, =davinci_uart_phys
|
||||
add \rv, \rp, #4 @ davinci_uart_virt
|
||||
ldr \rp, [\rp, #0]
|
||||
ldr \rv, [\rv, #0]
|
||||
10: adr \rp, 99f @ get effective addr of 99f
|
||||
ldr \rv, [\rp] @ get absolute addr of 99f
|
||||
sub \rv, \rv, \rp @ offset between the two
|
||||
ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys
|
||||
sub \tmp, \rp, \rv @ make it effective
|
||||
ldr \rp, [\tmp, #0] @ davinci_uart_phys
|
||||
ldr \rv, [\tmp, #4] @ davinci_uart_virt
|
||||
cmp \rp, #0 @ is port configured?
|
||||
cmpne \rv, #0
|
||||
bne 99f @ already configured
|
||||
bne 100f @ already configured
|
||||
|
||||
/* Check the debug UART address set in uncompress.h */
|
||||
mrc p15, 0, \rp, c1, c0
|
||||
tst \rp, #1 @ MMU enabled?
|
||||
and \rp, pc, #0xff000000
|
||||
ldr \rv, =DAVINCI_UART_INFO_OFS
|
||||
add \rp, \rp, \rv
|
||||
|
||||
/* Copy uart phys address from decompressor uart info */
|
||||
ldreq \rv, =davinci_uart_v2p(davinci_uart_phys)
|
||||
ldrne \rv, =davinci_uart_phys
|
||||
ldreq \rp, =DAVINCI_UART_INFO
|
||||
ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO)
|
||||
ldr \rp, [\rp, #0]
|
||||
str \rp, [\rv]
|
||||
ldr \rv, [\rp, #0]
|
||||
str \rv, [\tmp, #0]
|
||||
|
||||
/* Copy uart virt address from decompressor uart info */
|
||||
ldreq \rv, =davinci_uart_v2p(davinci_uart_virt)
|
||||
ldrne \rv, =davinci_uart_virt
|
||||
ldreq \rp, =DAVINCI_UART_INFO
|
||||
ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO)
|
||||
ldr \rp, [\rp, #4]
|
||||
str \rp, [\rv]
|
||||
ldr \rv, [\rp, #4]
|
||||
str \rv, [\tmp, #4]
|
||||
|
||||
b 10b
|
||||
99:
|
||||
|
||||
.align
|
||||
99: .word .
|
||||
.word davinci_uart_phys
|
||||
.ltorg
|
||||
|
||||
100:
|
||||
.endm
|
||||
|
||||
.macro senduart,rd,rx
|
||||
|
||||
@ -1,44 +0,0 @@
|
||||
/*
|
||||
* DaVinci memory space definitions
|
||||
*
|
||||
* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
|
||||
*
|
||||
* 2007 (c) MontaVista Software, Inc. This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or implied.
|
||||
*/
|
||||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
/**************************************************************************
|
||||
* Included Files
|
||||
**************************************************************************/
|
||||
#include <asm/page.h>
|
||||
#include <asm/sizes.h>
|
||||
|
||||
/**************************************************************************
|
||||
* Definitions
|
||||
**************************************************************************/
|
||||
#define DAVINCI_DDR_BASE 0x80000000
|
||||
#define DA8XX_DDR_BASE 0xc0000000
|
||||
|
||||
#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
|
||||
#error Cannot enable DaVinci and DA8XX platforms concurrently
|
||||
#elif defined(CONFIG_ARCH_DAVINCI_DA8XX)
|
||||
#define PLAT_PHYS_OFFSET DA8XX_DDR_BASE
|
||||
#else
|
||||
#define PLAT_PHYS_OFFSET DAVINCI_DDR_BASE
|
||||
#endif
|
||||
|
||||
#define DDR2_SDRCR_OFFSET 0xc
|
||||
#define DDR2_SRPD_BIT BIT(23)
|
||||
#define DDR2_MCLKSTOPEN_BIT BIT(30)
|
||||
#define DDR2_LPMODEN_BIT BIT(31)
|
||||
|
||||
/*
|
||||
* Increase size of DMA-consistent memory region
|
||||
*/
|
||||
#define CONSISTENT_DMA_SIZE (14<<20)
|
||||
|
||||
#endif /* __ASM_ARCH_MEMORY_H */
|
||||
@ -21,8 +21,9 @@
|
||||
* macros in debug-macro.S.
|
||||
*
|
||||
* This area sits just below the page tables (see arch/arm/kernel/head.S).
|
||||
* We define it as a relative offset from start of usable RAM.
|
||||
*/
|
||||
#define DAVINCI_UART_INFO (PLAT_PHYS_OFFSET + 0x3ff8)
|
||||
#define DAVINCI_UART_INFO_OFS 0x3ff8
|
||||
|
||||
#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
|
||||
#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
|
||||
|
||||
@ -43,7 +43,12 @@ static inline void flush(void)
|
||||
|
||||
static inline void set_uart_info(u32 phys, void * __iomem virt)
|
||||
{
|
||||
u32 *uart_info = (u32 *)(DAVINCI_UART_INFO);
|
||||
/*
|
||||
* Get address of some.bss variable and round it down
|
||||
* a la CONFIG_AUTO_ZRELADDR.
|
||||
*/
|
||||
u32 ram_start = (u32)&uart & 0xf8000000;
|
||||
u32 *uart_info = (u32 *)(ram_start + DAVINCI_UART_INFO_OFS);
|
||||
|
||||
uart = (u32 *)phys;
|
||||
uart_info[0] = phys;
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/assembler.h>
|
||||
#include <mach/psc.h>
|
||||
#include <mach/memory.h>
|
||||
#include <mach/ddr2.h>
|
||||
|
||||
#include "clock.h"
|
||||
|
||||
|
||||
@ -87,7 +87,7 @@ static void __init cm_a510_init(void)
|
||||
}
|
||||
|
||||
MACHINE_START(CM_A510, "Compulab CM-A510 Board")
|
||||
.boot_params = 0x00000100,
|
||||
.atag_offset = 0x100,
|
||||
.init_machine = cm_a510_init,
|
||||
.map_io = dove_map_io,
|
||||
.init_early = dove_init_early,
|
||||
|
||||
@ -94,7 +94,7 @@ static void __init dove_db_init(void)
|
||||
}
|
||||
|
||||
MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board")
|
||||
.boot_params = 0x00000100,
|
||||
.atag_offset = 0x100,
|
||||
.init_machine = dove_db_init,
|
||||
.map_io = dove_map_io,
|
||||
.init_early = dove_init_early,
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
|
||||
#include <mach/bridge-regs.h>
|
||||
|
||||
.macro addruart, rp, rv
|
||||
.macro addruart, rp, rv, tmp
|
||||
ldr \rp, =DOVE_SB_REGS_PHYS_BASE
|
||||
ldr \rv, =DOVE_SB_REGS_VIRT_BASE
|
||||
orr \rp, \rp, #0x00012000
|
||||
|
||||
@ -1,10 +0,0 @@
|
||||
/*
|
||||
* arch/arm/mach-dove/include/mach/memory.h
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif
|
||||
@ -280,7 +280,7 @@ arch_initcall(ebsa110_init);
|
||||
|
||||
MACHINE_START(EBSA110, "EBSA110")
|
||||
/* Maintainer: Russell King */
|
||||
.boot_params = 0x00000400,
|
||||
.atag_offset = 0x400,
|
||||
.reserve_lp0 = 1,
|
||||
.reserve_lp2 = 1,
|
||||
.soft_reboot = 1,
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
*
|
||||
**/
|
||||
|
||||
.macro addruart, rp, rv
|
||||
.macro addruart, rp, rv, tmp
|
||||
mov \rp, #0xf0000000
|
||||
orr \rp, \rp, #0x00000be0
|
||||
mov \rp, \rv
|
||||
|
||||
@ -33,7 +33,7 @@ static void __init adssphere_init_machine(void)
|
||||
|
||||
MACHINE_START(ADSSPHERE, "ADS Sphere board")
|
||||
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
|
||||
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
|
||||
@ -240,7 +240,7 @@ static void __init edb93xx_init_machine(void)
|
||||
#ifdef CONFIG_MACH_EDB9301
|
||||
MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
|
||||
/* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
|
||||
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
@ -251,7 +251,7 @@ MACHINE_END
|
||||
#ifdef CONFIG_MACH_EDB9302
|
||||
MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
|
||||
/* Maintainer: George Kashperko <george@chas.com.ua> */
|
||||
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
@ -262,7 +262,7 @@ MACHINE_END
|
||||
#ifdef CONFIG_MACH_EDB9302A
|
||||
MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
|
||||
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
|
||||
.boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
@ -273,7 +273,7 @@ MACHINE_END
|
||||
#ifdef CONFIG_MACH_EDB9307
|
||||
MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
|
||||
/* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */
|
||||
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
@ -284,7 +284,7 @@ MACHINE_END
|
||||
#ifdef CONFIG_MACH_EDB9307A
|
||||
MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
|
||||
/* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
|
||||
.boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
@ -295,7 +295,7 @@ MACHINE_END
|
||||
#ifdef CONFIG_MACH_EDB9312
|
||||
MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
|
||||
/* Maintainer: Toufeeq Hussain <toufeeq_hussain@infosys.com> */
|
||||
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
@ -306,7 +306,7 @@ MACHINE_END
|
||||
#ifdef CONFIG_MACH_EDB9315
|
||||
MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
|
||||
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
|
||||
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
@ -317,7 +317,7 @@ MACHINE_END
|
||||
#ifdef CONFIG_MACH_EDB9315A
|
||||
MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
|
||||
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
|
||||
.boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
|
||||
@ -33,7 +33,7 @@ static void __init gesbc9312_init_machine(void)
|
||||
|
||||
MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
|
||||
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
|
||||
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
*/
|
||||
#include <mach/ep93xx-regs.h>
|
||||
|
||||
.macro addruart, rp, rv
|
||||
.macro addruart, rp, rv, tmp
|
||||
ldr \rp, =EP93XX_APB_PHYS_BASE @ Physical base
|
||||
ldr \rv, =EP93XX_APB_VIRT_BASE @ virtual base
|
||||
orr \rp, \rp, #0x000c0000
|
||||
|
||||
@ -77,7 +77,7 @@ static void __init micro9_init_machine(void)
|
||||
#ifdef CONFIG_MACH_MICRO9H
|
||||
MACHINE_START(MICRO9, "Contec Micro9-High")
|
||||
/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
|
||||
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
@ -88,7 +88,7 @@ MACHINE_END
|
||||
#ifdef CONFIG_MACH_MICRO9M
|
||||
MACHINE_START(MICRO9M, "Contec Micro9-Mid")
|
||||
/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
|
||||
.boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
@ -99,7 +99,7 @@ MACHINE_END
|
||||
#ifdef CONFIG_MACH_MICRO9L
|
||||
MACHINE_START(MICRO9L, "Contec Micro9-Lite")
|
||||
/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
|
||||
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
@ -110,7 +110,7 @@ MACHINE_END
|
||||
#ifdef CONFIG_MACH_MICRO9S
|
||||
MACHINE_START(MICRO9S, "Contec Micro9-Slim")
|
||||
/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
|
||||
.boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
|
||||
@ -65,8 +65,8 @@ static void __init simone_init_machine(void)
|
||||
}
|
||||
|
||||
MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")
|
||||
/* Maintainer: Ryan Mallon */
|
||||
.boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
|
||||
/* Maintainer: Ryan Mallon */
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
|
||||
@ -163,7 +163,7 @@ static void __init snappercl15_init_machine(void)
|
||||
|
||||
MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
|
||||
/* Maintainer: Ryan Mallon */
|
||||
.boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ep93xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
|
||||
@ -257,7 +257,7 @@ static void __init ts72xx_init_machine(void)
|
||||
|
||||
MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
|
||||
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
|
||||
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ts72xx_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
|
||||
@ -20,7 +20,7 @@
|
||||
* aligned and add in the offset when we load the value here.
|
||||
*/
|
||||
|
||||
.macro addruart, rp, rv
|
||||
.macro addruart, rp, rv, tmp
|
||||
ldr \rp, = S3C_PA_UART
|
||||
ldr \rv, = S3C_VA_UART
|
||||
#if CONFIG_DEBUG_S3C_UART != 0
|
||||
|
||||
@ -207,7 +207,7 @@ static void __init armlex4210_machine_init(void)
|
||||
|
||||
MACHINE_START(ARMLEX4210, "ARMLEX4210")
|
||||
/* Maintainer: Alim Akhtar <alim.akhtar@samsung.com> */
|
||||
.boot_params = S5P_PA_SDRAM + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.init_irq = exynos4_init_irq,
|
||||
.map_io = armlex4210_map_io,
|
||||
.init_machine = armlex4210_machine_init,
|
||||
|
||||
@ -1186,7 +1186,7 @@ static void __init nuri_machine_init(void)
|
||||
|
||||
MACHINE_START(NURI, "NURI")
|
||||
/* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
|
||||
.boot_params = S5P_PA_SDRAM + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.init_irq = exynos4_init_irq,
|
||||
.map_io = nuri_map_io,
|
||||
.init_machine = nuri_machine_init,
|
||||
|
||||
@ -1055,7 +1055,7 @@ static void __init universal_machine_init(void)
|
||||
|
||||
MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
|
||||
/* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
|
||||
.boot_params = S5P_PA_SDRAM + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.init_irq = exynos4_init_irq,
|
||||
.map_io = universal_map_io,
|
||||
.init_machine = universal_machine_init,
|
||||
|
||||
@ -86,7 +86,7 @@ fixup_cats(struct machine_desc *desc, struct tag *tags,
|
||||
|
||||
MACHINE_START(CATS, "Chalice-CATS")
|
||||
/* Maintainer: Philip Blundell */
|
||||
.boot_params = 0x00000100,
|
||||
.atag_offset = 0x100,
|
||||
.soft_reboot = 1,
|
||||
.fixup = fixup_cats,
|
||||
.map_io = footbridge_map_io,
|
||||
|
||||
@ -15,7 +15,7 @@
|
||||
|
||||
MACHINE_START(EBSA285, "EBSA285")
|
||||
/* Maintainer: Russell King */
|
||||
.boot_params = 0x00000100,
|
||||
.atag_offset = 0x100,
|
||||
.video_start = 0x000a0000,
|
||||
.video_end = 0x000bffff,
|
||||
.map_io = footbridge_map_io,
|
||||
|
||||
@ -15,7 +15,7 @@
|
||||
|
||||
#ifndef CONFIG_DEBUG_DC21285_PORT
|
||||
/* For NetWinder debugging */
|
||||
.macro addruart, rp, rv
|
||||
.macro addruart, rp, rv, tmp
|
||||
mov \rp, #0x000003f8
|
||||
orr \rv, \rp, #0xff000000 @ virtual
|
||||
orr \rp, \rp, #0x7c000000 @ physical
|
||||
@ -31,7 +31,7 @@
|
||||
.equ dc21285_high, ARMCSR_BASE & 0xff000000
|
||||
.equ dc21285_low, ARMCSR_BASE & 0x00ffffff
|
||||
|
||||
.macro addruart, rp, rv
|
||||
.macro addruart, rp, rv, tmp
|
||||
.if dc21285_low
|
||||
mov \rp, #dc21285_low
|
||||
.else
|
||||
|
||||
@ -648,7 +648,7 @@ fixup_netwinder(struct machine_desc *desc, struct tag *tags,
|
||||
|
||||
MACHINE_START(NETWINDER, "Rebel-NetWinder")
|
||||
/* Maintainer: Russell King/Rebel.com */
|
||||
.boot_params = 0x00000100,
|
||||
.atag_offset = 0x100,
|
||||
.video_start = 0x000a0000,
|
||||
.video_end = 0x000bffff,
|
||||
.reserve_lp0 = 1,
|
||||
|
||||
@ -15,7 +15,7 @@
|
||||
|
||||
MACHINE_START(PERSONAL_SERVER, "Compaq-PersonalServer")
|
||||
/* Maintainer: Jamey Hicks / George France */
|
||||
.boot_params = 0x00000100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = footbridge_map_io,
|
||||
.init_irq = footbridge_init_irq,
|
||||
.timer = &footbridge_timer,
|
||||
|
||||
@ -102,7 +102,7 @@ static void __init ib4220b_init(void)
|
||||
}
|
||||
|
||||
MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B")
|
||||
.boot_params = 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = gemini_map_io,
|
||||
.init_irq = gemini_init_irq,
|
||||
.timer = &ib4220b_timer,
|
||||
|
||||
@ -86,7 +86,7 @@ static void __init rut1xx_init(void)
|
||||
}
|
||||
|
||||
MACHINE_START(RUT100, "Teltonika RUT100")
|
||||
.boot_params = 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = gemini_map_io,
|
||||
.init_irq = gemini_init_irq,
|
||||
.timer = &rut1xx_timer,
|
||||
|
||||
@ -129,7 +129,7 @@ static void __init wbd111_init(void)
|
||||
}
|
||||
|
||||
MACHINE_START(WBD111, "Wiliboard WBD-111")
|
||||
.boot_params = 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = gemini_map_io,
|
||||
.init_irq = gemini_init_irq,
|
||||
.timer = &wbd111_timer,
|
||||
|
||||
@ -129,7 +129,7 @@ static void __init wbd222_init(void)
|
||||
}
|
||||
|
||||
MACHINE_START(WBD222, "Wiliboard WBD-222")
|
||||
.boot_params = 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = gemini_map_io,
|
||||
.init_irq = gemini_init_irq,
|
||||
.timer = &wbd222_timer,
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
|
||||
.macro addruart, rp, rv
|
||||
.macro addruart, rp, rv, tmp
|
||||
ldr \rp, =GEMINI_UART_BASE @ physical
|
||||
ldr \rv, =IO_ADDRESS(GEMINI_UART_BASE) @ virtual
|
||||
.endm
|
||||
|
||||
@ -1,19 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2001-2006 Storlink, Corp.
|
||||
* Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
#ifndef __MACH_MEMORY_H
|
||||
#define __MACH_MEMORY_H
|
||||
|
||||
#ifdef CONFIG_GEMINI_MEM_SWAP
|
||||
# define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
#else
|
||||
# define PLAT_PHYS_OFFSET UL(0x10000000)
|
||||
#endif
|
||||
|
||||
#endif /* __MACH_MEMORY_H */
|
||||
@ -29,7 +29,7 @@
|
||||
|
||||
MACHINE_START(H7201, "Hynix GMS30C7201")
|
||||
/* Maintainer: Robert Schwebel, Pengutronix */
|
||||
.boot_params = 0xc0001000,
|
||||
.atag_offset = 0x1000,
|
||||
.map_io = h720x_map_io,
|
||||
.init_irq = h720x_init_irq,
|
||||
.timer = &h7201_timer,
|
||||
|
||||
@ -71,7 +71,7 @@ static void __init init_eval_h7202(void)
|
||||
|
||||
MACHINE_START(H7202, "Hynix HMS30C7202")
|
||||
/* Maintainer: Robert Schwebel, Pengutronix */
|
||||
.boot_params = 0x40000100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = h720x_map_io,
|
||||
.init_irq = h7202_init_irq,
|
||||
.timer = &h7202_timer,
|
||||
|
||||
@ -16,7 +16,7 @@
|
||||
.equ io_virt, IO_VIRT
|
||||
.equ io_phys, IO_PHYS
|
||||
|
||||
.macro addruart, rp, rv
|
||||
.macro addruart, rp, rv, tmp
|
||||
mov \rp, #0x00020000 @ UART1
|
||||
add \rv, \rp, #io_virt @ virtual address
|
||||
add \rp, \rp, #io_phys @ physical base address
|
||||
|
||||
@ -1,11 +0,0 @@
|
||||
/*
|
||||
* arch/arm/mach-h720x/include/mach/memory.h
|
||||
*
|
||||
* Copyright (c) 2000 Jungjun Kim
|
||||
*
|
||||
*/
|
||||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PLAT_PHYS_OFFSET UL(0x40000000)
|
||||
#endif
|
||||
@ -558,7 +558,7 @@ static struct sys_timer armadillo5x0_timer = {
|
||||
|
||||
MACHINE_START(ARMADILLO5X0, "Armadillo-500")
|
||||
/* Maintainer: Alberto Panizzo */
|
||||
.boot_params = MX3x_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx31_map_io,
|
||||
.init_early = imx31_init_early,
|
||||
.init_irq = mx31_init_irq,
|
||||
|
||||
@ -311,7 +311,7 @@ static struct sys_timer eukrea_cpuimx27_timer = {
|
||||
};
|
||||
|
||||
MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
|
||||
.boot_params = MX27_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx27_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
.init_irq = mx27_init_irq,
|
||||
|
||||
@ -194,7 +194,7 @@ struct sys_timer eukrea_cpuimx35_timer = {
|
||||
|
||||
MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35")
|
||||
/* Maintainer: Eukrea Electromatique */
|
||||
.boot_params = MX3x_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx35_map_io,
|
||||
.init_early = imx35_init_early,
|
||||
.init_irq = mx35_init_irq,
|
||||
|
||||
@ -163,7 +163,7 @@ static struct sys_timer eukrea_cpuimx25_timer = {
|
||||
|
||||
MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25")
|
||||
/* Maintainer: Eukrea Electromatique */
|
||||
.boot_params = MX25_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx25_map_io,
|
||||
.init_early = imx25_init_early,
|
||||
.init_irq = mx25_init_irq,
|
||||
|
||||
@ -275,7 +275,7 @@ static struct sys_timer visstrim_m10_timer = {
|
||||
};
|
||||
|
||||
MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
|
||||
.boot_params = MX27_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx27_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
.init_irq = mx27_init_irq,
|
||||
|
||||
@ -71,7 +71,7 @@ static struct sys_timer mx27ipcam_timer = {
|
||||
|
||||
MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM")
|
||||
/* maintainer: Freescale Semiconductor, Inc. */
|
||||
.boot_params = MX27_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx27_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
.init_irq = mx27_init_irq,
|
||||
|
||||
@ -77,7 +77,7 @@ static struct sys_timer mx27lite_timer = {
|
||||
};
|
||||
|
||||
MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
|
||||
.boot_params = MX27_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx27_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
.init_irq = mx27_init_irq,
|
||||
|
||||
@ -271,7 +271,7 @@ static struct sys_timer kzm_timer = {
|
||||
};
|
||||
|
||||
MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
|
||||
.boot_params = MX3x_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = kzm_map_io,
|
||||
.init_early = imx31_init_early,
|
||||
.init_irq = mx31_init_irq,
|
||||
|
||||
@ -145,7 +145,7 @@ struct sys_timer mx1ads_timer = {
|
||||
|
||||
MACHINE_START(MX1ADS, "Freescale MX1ADS")
|
||||
/* Maintainer: Sascha Hauer, Pengutronix */
|
||||
.boot_params = MX1_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx1_map_io,
|
||||
.init_early = imx1_init_early,
|
||||
.init_irq = mx1_init_irq,
|
||||
@ -154,7 +154,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(MXLADS, "Freescale MXLADS")
|
||||
.boot_params = MX1_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx1_map_io,
|
||||
.init_early = imx1_init_early,
|
||||
.init_irq = mx1_init_irq,
|
||||
|
||||
@ -305,7 +305,7 @@ static struct sys_timer mx21ads_timer = {
|
||||
|
||||
MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
|
||||
/* maintainer: Freescale Semiconductor, Inc. */
|
||||
.boot_params = MX21_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx21ads_map_io,
|
||||
.init_early = imx21_init_early,
|
||||
.init_irq = mx21_init_irq,
|
||||
|
||||
@ -253,7 +253,7 @@ static struct sys_timer mx25pdk_timer = {
|
||||
|
||||
MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
|
||||
/* Maintainer: Freescale Semiconductor, Inc. */
|
||||
.boot_params = MX25_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx25_map_io,
|
||||
.init_early = imx25_init_early,
|
||||
.init_irq = mx25_init_irq,
|
||||
|
||||
@ -421,7 +421,7 @@ static struct sys_timer mx27pdk_timer = {
|
||||
|
||||
MACHINE_START(MX27_3DS, "Freescale MX27PDK")
|
||||
/* maintainer: Freescale Semiconductor, Inc. */
|
||||
.boot_params = MX27_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx27_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
.init_irq = mx27_init_irq,
|
||||
|
||||
@ -345,7 +345,7 @@ static void __init mx27ads_map_io(void)
|
||||
|
||||
MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
|
||||
/* maintainer: Freescale Semiconductor, Inc. */
|
||||
.boot_params = MX27_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx27ads_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
.init_irq = mx27_init_irq,
|
||||
|
||||
@ -764,7 +764,7 @@ static void __init mx31_3ds_reserve(void)
|
||||
|
||||
MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
|
||||
/* Maintainer: Freescale Semiconductor, Inc. */
|
||||
.boot_params = MX3x_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx31_map_io,
|
||||
.init_early = imx31_init_early,
|
||||
.init_irq = mx31_init_irq,
|
||||
|
||||
@ -535,7 +535,7 @@ static struct sys_timer mx31ads_timer = {
|
||||
|
||||
MACHINE_START(MX31ADS, "Freescale MX31ADS")
|
||||
/* Maintainer: Freescale Semiconductor, Inc. */
|
||||
.boot_params = MX3x_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx31ads_map_io,
|
||||
.init_early = imx31_init_early,
|
||||
.init_irq = mx31ads_init_irq,
|
||||
|
||||
@ -295,7 +295,7 @@ static struct sys_timer mx31lilly_timer = {
|
||||
};
|
||||
|
||||
MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
|
||||
.boot_params = MX3x_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx31_map_io,
|
||||
.init_early = imx31_init_early,
|
||||
.init_irq = mx31_init_irq,
|
||||
|
||||
@ -280,7 +280,7 @@ struct sys_timer mx31lite_timer = {
|
||||
|
||||
MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
|
||||
/* Maintainer: Freescale Semiconductor, Inc. */
|
||||
.boot_params = MX3x_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx31lite_map_io,
|
||||
.init_early = imx31_init_early,
|
||||
.init_irq = mx31_init_irq,
|
||||
|
||||
@ -567,7 +567,7 @@ static void __init mx31moboard_reserve(void)
|
||||
|
||||
MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
|
||||
/* Maintainer: Valentin Longchamp, EPFL Mobots group */
|
||||
.boot_params = MX3x_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.reserve = mx31moboard_reserve,
|
||||
.map_io = mx31_map_io,
|
||||
.init_early = imx31_init_early,
|
||||
|
||||
@ -217,7 +217,7 @@ struct sys_timer mx35pdk_timer = {
|
||||
|
||||
MACHINE_START(MX35_3DS, "Freescale MX35PDK")
|
||||
/* Maintainer: Freescale Semiconductor, Inc */
|
||||
.boot_params = MX3x_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx35_map_io,
|
||||
.init_early = imx35_init_early,
|
||||
.init_irq = mx35_init_irq,
|
||||
|
||||
@ -267,7 +267,7 @@ static struct sys_timer mxt_td60_timer = {
|
||||
|
||||
MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
|
||||
/* maintainer: Maxtrack Industrial */
|
||||
.boot_params = MX27_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx27_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
.init_irq = mx27_init_irq,
|
||||
|
||||
@ -435,7 +435,7 @@ static struct sys_timer pca100_timer = {
|
||||
};
|
||||
|
||||
MACHINE_START(PCA100, "phyCARD-i.MX27")
|
||||
.boot_params = MX27_PHYS_OFFSET + 0x100,
|
||||
.atag_offset = 0x100,
|
||||
.map_io = mx27_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
.init_irq = mx27_init_irq,
|
||||
|
||||
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Reference in New Issue
Block a user