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x86/tsc: Calibrate tsc only once
During boot tsc is calibrated twice: once in tsc_early_delay_calibrate(), and the second time in tsc_init(). Rename tsc_early_delay_calibrate() to tsc_early_init(), and rework it so the calibration is done only early, and make tsc_init() to use the values already determined in tsc_early_init(). Sometimes it is not possible to determine tsc early, as the subsystem that is required is not yet initialized, in such case try again later in tsc_init(). Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Pavel Tatashin <pasha.tatashin@oracle.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: steven.sistare@oracle.com Cc: daniel.m.jordan@oracle.com Cc: linux@armlinux.org.uk Cc: schwidefsky@de.ibm.com Cc: heiko.carstens@de.ibm.com Cc: john.stultz@linaro.org Cc: sboyd@codeaurora.org Cc: hpa@zytor.com Cc: douly.fnst@cn.fujitsu.com Cc: peterz@infradead.org Cc: prarit@redhat.com Cc: feng.tang@intel.com Cc: pmladek@suse.com Cc: gnomes@lxorguk.ukuu.org.uk Cc: linux-s390@vger.kernel.org Cc: boris.ostrovsky@oracle.com Cc: jgross@suse.com Cc: pbonzini@redhat.com Link: https://lkml.kernel.org/r/20180719205545.16512-20-pasha.tatashin@oracle.com
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@ -33,7 +33,7 @@ static inline cycles_t get_cycles(void)
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extern struct system_counterval_t convert_art_to_tsc(u64 art);
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extern struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns);
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extern void tsc_early_delay_calibrate(void);
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extern void tsc_early_init(void);
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extern void tsc_init(void);
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extern void mark_tsc_unstable(char *reason);
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extern int unsynchronized_tsc(void);
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@ -1014,6 +1014,7 @@ void __init setup_arch(char **cmdline_p)
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*/
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init_hypervisor_platform();
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tsc_early_init();
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x86_init.resources.probe_roms();
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/* after parse_early_param, so could debug it */
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@ -1199,7 +1200,6 @@ void __init setup_arch(char **cmdline_p)
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memblock_find_dma_reserve();
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tsc_early_delay_calibrate();
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if (!early_xdbc_setup_hardware())
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early_xdbc_register_console();
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@ -33,6 +33,8 @@ EXPORT_SYMBOL(cpu_khz);
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unsigned int __read_mostly tsc_khz;
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EXPORT_SYMBOL(tsc_khz);
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#define KHZ 1000
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/*
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* TSC can be unstable due to cpufreq or due to unsynced TSCs
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*/
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@ -1335,34 +1337,10 @@ unreg:
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*/
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device_initcall(init_tsc_clocksource);
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void __init tsc_early_delay_calibrate(void)
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static bool __init determine_cpu_tsc_frequencies(void)
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{
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unsigned long lpj;
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if (!boot_cpu_has(X86_FEATURE_TSC))
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return;
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cpu_khz = x86_platform.calibrate_cpu();
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tsc_khz = x86_platform.calibrate_tsc();
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tsc_khz = tsc_khz ? : cpu_khz;
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if (!tsc_khz)
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return;
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lpj = tsc_khz * 1000;
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do_div(lpj, HZ);
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loops_per_jiffy = lpj;
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}
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void __init tsc_init(void)
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{
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u64 lpj, cyc;
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int cpu;
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if (!boot_cpu_has(X86_FEATURE_TSC)) {
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setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER);
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return;
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}
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/* Make sure that cpu and tsc are not already calibrated */
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WARN_ON(cpu_khz || tsc_khz);
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cpu_khz = x86_platform.calibrate_cpu();
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tsc_khz = x86_platform.calibrate_tsc();
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@ -1377,20 +1355,52 @@ void __init tsc_init(void)
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else if (abs(cpu_khz - tsc_khz) * 10 > tsc_khz)
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cpu_khz = tsc_khz;
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if (!tsc_khz) {
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mark_tsc_unstable("could not calculate TSC khz");
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if (tsc_khz == 0)
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return false;
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pr_info("Detected %lu.%03lu MHz processor\n",
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(unsigned long)cpu_khz / KHZ,
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(unsigned long)cpu_khz % KHZ);
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if (cpu_khz != tsc_khz) {
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pr_info("Detected %lu.%03lu MHz TSC",
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(unsigned long)tsc_khz / KHZ,
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(unsigned long)tsc_khz % KHZ);
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}
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return true;
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}
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static unsigned long __init get_loops_per_jiffy(void)
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{
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unsigned long lpj = tsc_khz * KHZ;
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do_div(lpj, HZ);
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return lpj;
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}
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void __init tsc_early_init(void)
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{
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if (!boot_cpu_has(X86_FEATURE_TSC))
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return;
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if (!determine_cpu_tsc_frequencies())
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return;
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loops_per_jiffy = get_loops_per_jiffy();
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}
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void __init tsc_init(void)
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{
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if (!boot_cpu_has(X86_FEATURE_TSC)) {
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setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER);
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return;
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}
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pr_info("Detected %lu.%03lu MHz processor\n",
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(unsigned long)cpu_khz / 1000,
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(unsigned long)cpu_khz % 1000);
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if (cpu_khz != tsc_khz) {
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pr_info("Detected %lu.%03lu MHz TSC",
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(unsigned long)tsc_khz / 1000,
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(unsigned long)tsc_khz % 1000);
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if (!tsc_khz) {
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/* We failed to determine frequencies earlier, try again */
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if (!determine_cpu_tsc_frequencies()) {
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mark_tsc_unstable("could not calculate TSC khz");
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setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER);
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return;
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}
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}
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/* Sanitize TSC ADJUST before cyc2ns gets initialized */
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@ -1413,10 +1423,7 @@ void __init tsc_init(void)
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if (!no_sched_irq_time)
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enable_sched_clock_irqtime();
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lpj = ((u64)tsc_khz * 1000);
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do_div(lpj, HZ);
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lpj_fine = lpj;
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lpj_fine = get_loops_per_jiffy();
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use_tsc_delay();
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check_system_tsc_reliable();
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