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rtlwifi: cleanup the code that check whether TX ring is available

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Remove the duplicate checking of TX ring's available number, and remove
the variable to store available number that can be calculated by
read/write pointers.

Signed-off-by: Steven Ting <steventing@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Ping-Ke Shih 2017-11-13 17:39:35 +08:00 committed by Kalle Valo
parent dc9682a0cc
commit cf54622c80
3 changed files with 6 additions and 54 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/net/wireless/realtek/rtlwifi/pci.c
View File

@ -557,13 +557,6 @@ static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
else
entry = (u8 *)(&ring->desc[ring->idx]);
if (rtlpriv->cfg->ops->get_available_desc &&
rtlpriv->cfg->ops->get_available_desc(hw, prio) <= 1) {
RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_DMESG,
"no available desc!\n");
return;
}
if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
return;
ring->idx = (ring->idx + 1) % ring->entries;
@ -1250,7 +1243,6 @@ static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
rtlpci->tx_ring[prio].cur_tx_rp = 0;
rtlpci->tx_ring[prio].cur_tx_wp = 0;
rtlpci->tx_ring[prio].avl_desc = entries;
}
/* alloc dma for this ring */

1
drivers/net/wireless/realtek/rtlwifi/pci.h
View File

@ -173,7 +173,6 @@ struct rtl8192_tx_ring {
/*add for new trx flow*/
struct rtl_tx_buffer_desc *buffer_desc; /*tx buffer descriptor*/
dma_addr_t buffer_desc_dma; /*tx bufferd desc dma memory*/
u16 avl_desc; /* available_desc_to_write */
u16 cur_tx_wp; /* current_tx_write_point */
u16 cur_tx_rp; /* current_tx_read_point */
};

51
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c
View File

@ -549,7 +549,6 @@ static u16 get_desc_addr_fr_q_idx(u16 queue_index)
u16 rtl92ee_get_available_desc(struct ieee80211_hw *hw, u8 q_idx)
{
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_priv *rtlpriv = rtl_priv(hw);
u16 point_diff = 0;
u16 current_tx_read_point = 0, current_tx_write_point = 0;
@ -564,7 +563,6 @@ u16 rtl92ee_get_available_desc(struct ieee80211_hw *hw, u8 q_idx)
current_tx_write_point,
TX_DESC_NUM_92E);
rtlpci->tx_ring[q_idx].avl_desc = point_diff;
return point_diff;
}
@ -909,10 +907,6 @@ void rtl92ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
u8 desc_name, u8 *val)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
u16 cur_tx_rp = 0;
u16 cur_tx_wp = 0;
static bool over_run;
u32 tmp = 0;
u8 q_idx = *val;
bool dma64 = rtlpriv->cfg->mod_params->dma64;
@ -933,38 +927,12 @@ void rtl92ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
return;
}
/* make sure tx desc is available by caller */
ring->cur_tx_wp = ((ring->cur_tx_wp + 1) % max_tx_desc);
if (over_run) {
ring->cur_tx_wp = 0;
over_run = false;
}
if (ring->avl_desc > 1) {
ring->avl_desc--;
rtl_write_word(rtlpriv,
get_desc_addr_fr_q_idx(q_idx),
ring->cur_tx_wp);
}
if (ring->avl_desc < (max_tx_desc - 15)) {
u16 point_diff = 0;
tmp =
rtl_read_dword(rtlpriv,
get_desc_addr_fr_q_idx(q_idx));
cur_tx_rp = (u16)((tmp >> 16) & 0x0fff);
cur_tx_wp = (u16)(tmp & 0x0fff);
ring->cur_tx_wp = cur_tx_wp;
ring->cur_tx_rp = cur_tx_rp;
point_diff = ((cur_tx_rp > cur_tx_wp) ?
(cur_tx_rp - cur_tx_wp) :
(TX_DESC_NUM_92E - 1 -
cur_tx_wp + cur_tx_rp));
ring->avl_desc = point_diff;
}
rtl_write_word(rtlpriv,
get_desc_addr_fr_q_idx(q_idx),
ring->cur_tx_wp);
}
break;
}
@ -1046,13 +1014,12 @@ bool rtl92ee_is_tx_desc_closed(struct ieee80211_hw *hw, u8 hw_queue, u16 index)
{
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_priv *rtlpriv = rtl_priv(hw);
u16 read_point, write_point, available_desc_num;
u16 read_point, write_point;
bool ret = false;
static u8 stop_report_cnt;
struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
{
u16 point_diff = 0;
u16 cur_tx_rp, cur_tx_wp;
u32 tmpu32 = 0;
@ -1062,18 +1029,12 @@ bool rtl92ee_is_tx_desc_closed(struct ieee80211_hw *hw, u8 hw_queue, u16 index)
cur_tx_rp = (u16)((tmpu32 >> 16) & 0x0fff);
cur_tx_wp = (u16)(tmpu32 & 0x0fff);
ring->cur_tx_wp = cur_tx_wp;
/* don't need to update ring->cur_tx_wp */
ring->cur_tx_rp = cur_tx_rp;
point_diff = ((cur_tx_rp > cur_tx_wp) ?
(cur_tx_rp - cur_tx_wp) :
(TX_DESC_NUM_92E - cur_tx_wp + cur_tx_rp));
ring->avl_desc = point_diff;
}
read_point = ring->cur_tx_rp;
write_point = ring->cur_tx_wp;
available_desc_num = ring->avl_desc;
if (write_point > read_point) {
if (index < write_point && index >= read_point)