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ASoC/SOF/PCI/Intel: add PantherLake support
Merge series from Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>: Add initial support for the PantherLake platform, and initial ACPI configurations.
This commit is contained in:
commit
cf410c1bea
@ -33,6 +33,7 @@ extern struct snd_soc_acpi_mach snd_soc_acpi_intel_rpl_machines[];
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extern struct snd_soc_acpi_mach snd_soc_acpi_intel_mtl_machines[];
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extern struct snd_soc_acpi_mach snd_soc_acpi_intel_lnl_machines[];
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extern struct snd_soc_acpi_mach snd_soc_acpi_intel_arl_machines[];
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extern struct snd_soc_acpi_mach snd_soc_acpi_intel_ptl_machines[];
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extern struct snd_soc_acpi_mach snd_soc_acpi_intel_cnl_sdw_machines[];
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extern struct snd_soc_acpi_mach snd_soc_acpi_intel_cfl_sdw_machines[];
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@ -44,6 +45,7 @@ extern struct snd_soc_acpi_mach snd_soc_acpi_intel_rpl_sdw_machines[];
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extern struct snd_soc_acpi_mach snd_soc_acpi_intel_mtl_sdw_machines[];
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extern struct snd_soc_acpi_mach snd_soc_acpi_intel_lnl_sdw_machines[];
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extern struct snd_soc_acpi_mach snd_soc_acpi_intel_arl_sdw_machines[];
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extern struct snd_soc_acpi_mach snd_soc_acpi_intel_ptl_sdw_machines[];
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/*
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* generic table used for HDA codec-based platforms, possibly with
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@ -12,6 +12,7 @@ snd-soc-acpi-intel-match-y := soc-acpi-intel-byt-match.o soc-acpi-intel-cht-matc
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soc-acpi-intel-rpl-match.o soc-acpi-intel-mtl-match.o \
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soc-acpi-intel-arl-match.o \
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soc-acpi-intel-lnl-match.o \
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soc-acpi-intel-ptl-match.o \
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soc-acpi-intel-hda-match.o \
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soc-acpi-intel-sdw-mockup-match.o
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145
sound/soc/intel/common/soc-acpi-intel-ptl-match.c
Normal file
145
sound/soc/intel/common/soc-acpi-intel-ptl-match.c
Normal file
@ -0,0 +1,145 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* soc-acpi-intel-ptl-match.c - tables and support for PTL ACPI enumeration.
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*
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* Copyright (c) 2024, Intel Corporation.
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*
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*/
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#include <sound/soc-acpi.h>
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#include <sound/soc-acpi-intel-match.h>
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#include "soc-acpi-intel-sdw-mockup-match.h"
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struct snd_soc_acpi_mach snd_soc_acpi_intel_ptl_machines[] = {
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{},
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};
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EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_ptl_machines);
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static const struct snd_soc_acpi_endpoint single_endpoint = {
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.num = 0,
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.aggregated = 0,
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.group_position = 0,
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.group_id = 0,
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};
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/*
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* RT722 is a multi-function codec, three endpoints are created for
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* its headset, amp and dmic functions.
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*/
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static const struct snd_soc_acpi_endpoint rt722_endpoints[] = {
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{
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.num = 0,
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.aggregated = 0,
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.group_position = 0,
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.group_id = 0,
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},
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{
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.num = 1,
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.aggregated = 0,
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.group_position = 0,
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.group_id = 0,
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},
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{
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.num = 2,
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.aggregated = 0,
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.group_position = 0,
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.group_id = 0,
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},
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};
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static const struct snd_soc_acpi_adr_device rt711_sdca_0_adr[] = {
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{
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.adr = 0x000030025D071101ull,
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.num_endpoints = 1,
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.endpoints = &single_endpoint,
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.name_prefix = "rt711"
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}
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};
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static const struct snd_soc_acpi_adr_device rt722_0_single_adr[] = {
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{
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.adr = 0x000030025d072201ull,
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.num_endpoints = ARRAY_SIZE(rt722_endpoints),
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.endpoints = rt722_endpoints,
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.name_prefix = "rt722"
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}
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};
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static const struct snd_soc_acpi_adr_device rt722_3_single_adr[] = {
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{
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.adr = 0x000330025d072201ull,
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.num_endpoints = ARRAY_SIZE(rt722_endpoints),
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.endpoints = rt722_endpoints,
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.name_prefix = "rt722"
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}
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};
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static const struct snd_soc_acpi_link_adr ptl_rt722_only[] = {
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{
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.mask = BIT(0),
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.num_adr = ARRAY_SIZE(rt722_0_single_adr),
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.adr_d = rt722_0_single_adr,
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},
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{}
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};
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static const struct snd_soc_acpi_link_adr ptl_rt722_l3[] = {
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{
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.mask = BIT(3),
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.num_adr = ARRAY_SIZE(rt722_3_single_adr),
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.adr_d = rt722_3_single_adr,
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},
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{}
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};
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static const struct snd_soc_acpi_link_adr ptl_rvp[] = {
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{
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.mask = BIT(0),
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.num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
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.adr_d = rt711_sdca_0_adr,
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},
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{}
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};
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/* this table is used when there is no I2S codec present */
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struct snd_soc_acpi_mach snd_soc_acpi_intel_ptl_sdw_machines[] = {
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/* mockup tests need to be first */
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{
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.link_mask = GENMASK(3, 0),
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.links = sdw_mockup_headset_2amps_mic,
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.drv_name = "sof_sdw",
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.sof_tplg_filename = "sof-ptl-rt711-rt1308-rt715.tplg",
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},
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{
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.link_mask = BIT(0) | BIT(1) | BIT(3),
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.links = sdw_mockup_headset_1amp_mic,
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.drv_name = "sof_sdw",
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.sof_tplg_filename = "sof-ptl-rt711-rt1308-mono-rt715.tplg",
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},
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{
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.link_mask = GENMASK(2, 0),
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.links = sdw_mockup_mic_headset_1amp,
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.drv_name = "sof_sdw",
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.sof_tplg_filename = "sof-ptl-rt715-rt711-rt1308-mono.tplg",
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},
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{
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.link_mask = BIT(0),
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.links = ptl_rvp,
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.drv_name = "sof_sdw",
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.sof_tplg_filename = "sof-ptl-rt711.tplg",
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},
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{
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.link_mask = BIT(0),
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.links = ptl_rt722_only,
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.drv_name = "sof_sdw",
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.sof_tplg_filename = "sof-ptl-rt722.tplg",
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},
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{
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.link_mask = BIT(3),
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.links = ptl_rt722_l3,
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.drv_name = "sof_sdw",
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.sof_tplg_filename = "sof-ptl-rt722.tplg",
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},
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{},
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};
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EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_ptl_sdw_machines);
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@ -281,6 +281,23 @@ config SND_SOC_SOF_LUNARLAKE
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Say Y if you have such a device.
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If unsure select "N".
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config SND_SOC_SOF_INTEL_PTL
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tristate
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select SND_SOC_SOF_HDA_COMMON
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select SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE
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select SND_SOC_SOF_IPC4
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select SND_SOC_SOF_INTEL_LNL
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config SND_SOC_SOF_PANTHERLAKE
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tristate "SOF support for Pantherlake"
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default SND_SOC_SOF_PCI
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select SND_SOC_SOF_INTEL_PTL
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help
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This adds support for Sound Open Firmware for Intel(R) platforms
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using the Pantherlake processors.
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Say Y if you have such a device.
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If unsure select "N".
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config SND_SOC_SOF_HDA_COMMON
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tristate
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@ -34,6 +34,7 @@ snd-sof-pci-intel-icl-y := pci-icl.o icl.o
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snd-sof-pci-intel-tgl-y := pci-tgl.o tgl.o
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snd-sof-pci-intel-mtl-y := pci-mtl.o mtl.o
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snd-sof-pci-intel-lnl-y := pci-lnl.o lnl.o
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snd-sof-pci-intel-ptl-y := pci-ptl.o
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obj-$(CONFIG_SND_SOC_SOF_MERRIFIELD) += snd-sof-pci-intel-tng.o
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obj-$(CONFIG_SND_SOC_SOF_INTEL_SKL) += snd-sof-pci-intel-skl.o
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@ -43,3 +44,4 @@ obj-$(CONFIG_SND_SOC_SOF_INTEL_ICL) += snd-sof-pci-intel-icl.o
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obj-$(CONFIG_SND_SOC_SOF_INTEL_TGL) += snd-sof-pci-intel-tgl.o
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obj-$(CONFIG_SND_SOC_SOF_INTEL_MTL) += snd-sof-pci-intel-mtl.o
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obj-$(CONFIG_SND_SOC_SOF_INTEL_LNL) += snd-sof-pci-intel-lnl.o
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obj-$(CONFIG_SND_SOC_SOF_INTEL_PTL) += snd-sof-pci-intel-ptl.o
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@ -69,6 +69,7 @@ static void hda_get_interfaces(struct snd_sof_dev *sdev, u32 *interface_mask)
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interface_mask[SOF_DAI_HOST_ACCESS] = BIT(SOF_DAI_INTEL_HDA);
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break;
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case SOF_INTEL_ACE_2_0:
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case SOF_INTEL_ACE_3_0:
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interface_mask[SOF_DAI_DSP_ACCESS] =
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BIT(SOF_DAI_INTEL_SSP) | BIT(SOF_DAI_INTEL_DMIC) |
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BIT(SOF_DAI_INTEL_HDA) | BIT(SOF_DAI_INTEL_ALH);
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@ -920,6 +920,7 @@ extern const struct sof_intel_dsp_desc adls_chip_info;
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extern const struct sof_intel_dsp_desc mtl_chip_info;
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extern const struct sof_intel_dsp_desc arl_s_chip_info;
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extern const struct sof_intel_dsp_desc lnl_chip_info;
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extern const struct sof_intel_dsp_desc ptl_chip_info;
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/* Probes support */
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_PROBES)
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@ -22,6 +22,7 @@
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/* LunarLake ops */
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struct snd_sof_dsp_ops sof_lnl_ops;
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EXPORT_SYMBOL_NS(sof_lnl_ops, SND_SOC_SOF_INTEL_LNL);
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static const struct snd_sof_debugfs_map lnl_dsp_debugfs[] = {
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{"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
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@ -181,6 +182,7 @@ int sof_lnl_ops_init(struct snd_sof_dev *sdev)
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return 0;
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};
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EXPORT_SYMBOL_NS(sof_lnl_ops_init, SND_SOC_SOF_INTEL_LNL);
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/* Check if an SDW IRQ occurred */
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static bool lnl_dsp_check_sdw_irq(struct snd_sof_dev *sdev)
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@ -245,3 +247,28 @@ const struct sof_intel_dsp_desc lnl_chip_info = {
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.disable_interrupts = lnl_dsp_disable_interrupts,
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.hw_ip_version = SOF_INTEL_ACE_2_0,
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};
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const struct sof_intel_dsp_desc ptl_chip_info = {
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.cores_num = 5,
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.init_core_mask = BIT(0),
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.host_managed_cores_mask = BIT(0),
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.ipc_req = MTL_DSP_REG_HFIPCXIDR,
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.ipc_req_mask = MTL_DSP_REG_HFIPCXIDR_BUSY,
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.ipc_ack = MTL_DSP_REG_HFIPCXIDA,
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.ipc_ack_mask = MTL_DSP_REG_HFIPCXIDA_DONE,
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.ipc_ctl = MTL_DSP_REG_HFIPCXCTL,
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.rom_status_reg = LNL_DSP_REG_HFDSC,
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.rom_init_timeout = 300,
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.ssp_count = MTL_SSP_COUNT,
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.d0i3_offset = MTL_HDA_VS_D0I3C,
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.read_sdw_lcount = hda_sdw_check_lcount_ext,
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.enable_sdw_irq = lnl_enable_sdw_irq,
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.check_sdw_irq = lnl_dsp_check_sdw_irq,
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.check_sdw_wakeen_irq = lnl_sdw_check_wakeen_irq,
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.check_ipc_irq = mtl_dsp_check_ipc_irq,
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.cl_init = mtl_dsp_cl_init,
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.power_down_dsp = mtl_power_down_dsp,
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.disable_interrupts = lnl_dsp_disable_interrupts,
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.hw_ip_version = SOF_INTEL_ACE_3_0,
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};
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EXPORT_SYMBOL_NS(ptl_chip_info, SND_SOC_SOF_INTEL_LNL);
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@ -245,6 +245,18 @@ int mtl_dsp_pre_fw_run(struct snd_sof_dev *sdev)
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u32 cpa;
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u32 pgs;
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int ret;
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u32 dsppwrctl;
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u32 dsppwrsts;
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const struct sof_intel_dsp_desc *chip;
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chip = get_chip_info(sdev->pdata);
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if (chip->hw_ip_version > SOF_INTEL_ACE_2_0) {
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dsppwrctl = PTL_HFPWRCTL2;
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dsppwrsts = PTL_HFPWRSTS2;
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} else {
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dsppwrctl = MTL_HFPWRCTL;
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dsppwrsts = MTL_HFPWRSTS;
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}
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/* Set the DSP subsystem power on */
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_HFDSSCS,
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@ -264,14 +276,14 @@ int mtl_dsp_pre_fw_run(struct snd_sof_dev *sdev)
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}
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/* Power up gated-DSP-0 domain in order to access the DSP shim register block. */
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_HFPWRCTL,
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, dsppwrctl,
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MTL_HFPWRCTL_WPDSPHPXPG, MTL_HFPWRCTL_WPDSPHPXPG);
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usleep_range(1000, 1010);
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/* poll with timeout to check if operation successful */
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pgs = MTL_HFPWRSTS_DSPHPXPGS_MASK;
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ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_HFPWRSTS, dsphfpwrsts,
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ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, dsppwrsts, dsphfpwrsts,
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(dsphfpwrsts & pgs) == pgs,
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HDA_DSP_REG_POLL_INTERVAL_US,
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HDA_DSP_RESET_TIMEOUT_US);
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|
@ -12,9 +12,11 @@
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#define MTL_HFDSSCS_CPA_MASK BIT(24)
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#define MTL_HFSNDWIE 0x114C
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#define MTL_HFPWRCTL 0x1D18
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#define PTL_HFPWRCTL2 0x1D20
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#define MTL_HfPWRCTL_WPIOXPG(x) BIT((x) + 8)
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#define MTL_HFPWRCTL_WPDSPHPXPG BIT(0)
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#define MTL_HFPWRSTS 0x1D1C
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#define PTL_HFPWRSTS2 0x1D24
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#define MTL_HFPWRSTS_DSPHPXPGS_MASK BIT(0)
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#define MTL_HFINTIPPTR 0x1108
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#define MTL_IRQ_INTEN_L_HOST_IPC_MASK BIT(0)
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|
77
sound/soc/sof/intel/pci-ptl.c
Normal file
77
sound/soc/sof/intel/pci-ptl.c
Normal file
@ -0,0 +1,77 @@
|
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
|
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//
|
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// This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
// redistributing this file, you may do so under either license.
|
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//
|
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// Copyright(c) 2024 Intel Corporation.
|
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//
|
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|
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#include <linux/module.h>
|
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#include <linux/pci.h>
|
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#include <sound/soc-acpi.h>
|
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#include <sound/soc-acpi-intel-match.h>
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#include <sound/sof.h>
|
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#include "../ops.h"
|
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#include "../sof-pci-dev.h"
|
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|
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/* platform specific devices */
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#include "hda.h"
|
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#include "mtl.h"
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|
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static const struct sof_dev_desc ptl_desc = {
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.use_acpi_target_states = true,
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.machines = snd_soc_acpi_intel_ptl_machines,
|
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.alt_machines = snd_soc_acpi_intel_ptl_sdw_machines,
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.resindex_lpe_base = 0,
|
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.resindex_pcicfg_base = -1,
|
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.resindex_imr_base = -1,
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.irqindex_host_ipc = -1,
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.chip_info = &ptl_chip_info,
|
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.ipc_supported_mask = BIT(SOF_IPC_TYPE_4),
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.ipc_default = SOF_IPC_TYPE_4,
|
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.dspless_mode_supported = true,
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.default_fw_path = {
|
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[SOF_IPC_TYPE_4] = "intel/sof-ipc4/ptl",
|
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},
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.default_lib_path = {
|
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[SOF_IPC_TYPE_4] = "intel/sof-ipc4-lib/ptl",
|
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},
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.default_tplg_path = {
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[SOF_IPC_TYPE_4] = "intel/sof-ipc4-tplg",
|
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},
|
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.default_fw_filename = {
|
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[SOF_IPC_TYPE_4] = "sof-ptl.ri",
|
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},
|
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.nocodec_tplg_filename = "sof-ptl-nocodec.tplg",
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.ops = &sof_lnl_ops,
|
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.ops_init = sof_lnl_ops_init,
|
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};
|
||||
|
||||
/* PCI IDs */
|
||||
static const struct pci_device_id sof_pci_ids[] = {
|
||||
{ PCI_DEVICE_DATA(INTEL, HDA_PTL, &ptl_desc) }, /* PTL */
|
||||
{ 0, }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(pci, sof_pci_ids);
|
||||
|
||||
/* pci_driver definition */
|
||||
static struct pci_driver snd_sof_pci_intel_ptl_driver = {
|
||||
.name = "sof-audio-pci-intel-ptl",
|
||||
.id_table = sof_pci_ids,
|
||||
.probe = hda_pci_intel_probe,
|
||||
.remove = sof_pci_remove,
|
||||
.shutdown = sof_pci_shutdown,
|
||||
.driver = {
|
||||
.pm = &sof_pci_pm,
|
||||
},
|
||||
};
|
||||
module_pci_driver(snd_sof_pci_intel_ptl_driver);
|
||||
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
MODULE_DESCRIPTION("SOF support for PantherLake platforms");
|
||||
MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_HDA_GENERIC);
|
||||
MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_HDA_COMMON);
|
||||
MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_LNL);
|
||||
MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_MTL);
|
||||
MODULE_IMPORT_NS(SND_SOC_SOF_HDA_MLINK);
|
||||
MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV);
|
@ -22,6 +22,7 @@ enum sof_intel_hw_ip_version {
|
||||
SOF_INTEL_CAVS_2_5, /* TigerLake, AlderLake */
|
||||
SOF_INTEL_ACE_1_0, /* MeteorLake */
|
||||
SOF_INTEL_ACE_2_0, /* LunarLake */
|
||||
SOF_INTEL_ACE_3_0, /* PantherLake */
|
||||
};
|
||||
|
||||
/*
|
||||
|
Loading…
Reference in New Issue
Block a user