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https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-11 04:18:39 +08:00
Merge branch 'uaccess.futex' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs into locking/core
Pull uaccess futex cleanups for Al Viro: Consolidate access_ok() usage and the futex uaccess function zoo.
This commit is contained in:
commit
cf226c42b2
@ -31,7 +31,8 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
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{
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int oldval = 0, ret;
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pagefault_disable();
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if (!access_ok(uaddr, sizeof(u32)))
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return -EFAULT;
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switch (op) {
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case FUTEX_OP_SET:
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@ -53,8 +54,6 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret)
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*oval = oldval;
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@ -75,10 +75,12 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
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{
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int oldval = 0, ret;
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if (!access_ok(uaddr, sizeof(u32)))
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return -EFAULT;
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#ifndef CONFIG_ARC_HAS_LLSC
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preempt_disable(); /* to guarantee atomic r-m-w of futex op */
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#endif
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pagefault_disable();
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switch (op) {
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case FUTEX_OP_SET:
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@ -101,7 +103,6 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
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ret = -ENOSYS;
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}
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pagefault_enable();
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#ifndef CONFIG_ARC_HAS_LLSC
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preempt_enable();
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#endif
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@ -134,10 +134,12 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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{
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int oldval = 0, ret, tmp;
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if (!access_ok(uaddr, sizeof(u32)))
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return -EFAULT;
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#ifndef CONFIG_SMP
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preempt_disable();
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#endif
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pagefault_disable();
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switch (op) {
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case FUTEX_OP_SET:
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@ -159,7 +161,6 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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ret = -ENOSYS;
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}
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pagefault_enable();
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#ifndef CONFIG_SMP
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preempt_enable();
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#endif
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@ -48,7 +48,8 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *_uaddr)
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int oldval = 0, ret, tmp;
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u32 __user *uaddr = __uaccess_mask_ptr(_uaddr);
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pagefault_disable();
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if (!access_ok(_uaddr, sizeof(u32)))
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return -EFAULT;
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switch (op) {
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case FUTEX_OP_SET:
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@ -75,8 +76,6 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *_uaddr)
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret)
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*oval = oldval;
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@ -36,7 +36,8 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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{
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int oldval = 0, ret;
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pagefault_disable();
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if (!access_ok(uaddr, sizeof(u32)))
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return -EFAULT;
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switch (op) {
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case FUTEX_OP_SET:
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@ -62,8 +63,6 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret)
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*oval = oldval;
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@ -50,7 +50,8 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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{
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int oldval = 0, ret;
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pagefault_disable();
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if (!access_ok(uaddr, sizeof(u32)))
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return -EFAULT;
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switch (op) {
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case FUTEX_OP_SET:
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@ -74,8 +75,6 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret)
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*oval = oldval;
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@ -34,7 +34,8 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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{
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int oldval = 0, ret;
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pagefault_disable();
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if (!access_ok(uaddr, sizeof(u32)))
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return -EFAULT;
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switch (op) {
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case FUTEX_OP_SET:
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@ -56,8 +57,6 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret)
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*oval = oldval;
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@ -89,7 +89,8 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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{
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int oldval = 0, ret;
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pagefault_disable();
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if (!access_ok(uaddr, sizeof(u32)))
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return -EFAULT;
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switch (op) {
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case FUTEX_OP_SET:
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@ -116,8 +117,6 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret)
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*oval = oldval;
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@ -66,8 +66,8 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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{
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int oldval = 0, ret;
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pagefault_disable();
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if (!access_ok(uaddr, sizeof(u32)))
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return -EFAULT;
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switch (op) {
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case FUTEX_OP_SET:
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__futex_atomic_op("move %0, %3", ret, oldval, tmp, uaddr,
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@ -93,8 +93,6 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret)
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*oval = oldval;
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@ -35,7 +35,8 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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{
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int oldval = 0, ret;
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pagefault_disable();
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if (!access_ok(uaddr, sizeof(u32)))
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return -EFAULT;
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switch (op) {
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case FUTEX_OP_SET:
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@ -57,8 +58,6 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret)
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*oval = oldval;
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@ -40,7 +40,6 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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u32 tmp;
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_futex_spin_lock_irqsave(uaddr, &flags);
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pagefault_disable();
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ret = -EFAULT;
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if (unlikely(get_user(oldval, uaddr) != 0))
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@ -73,7 +72,6 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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ret = -EFAULT;
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out_pagefault_enable:
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pagefault_enable();
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_futex_spin_unlock_irqrestore(uaddr, &flags);
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if (!ret)
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@ -35,8 +35,9 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
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{
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int oldval = 0, ret;
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if (!access_ok(uaddr, sizeof(u32)))
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return -EFAULT;
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allow_read_write_user(uaddr, uaddr, sizeof(*uaddr));
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pagefault_disable();
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switch (op) {
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case FUTEX_OP_SET:
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@ -58,8 +59,6 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
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ret = -ENOSYS;
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}
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pagefault_enable();
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*oval = oldval;
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prevent_read_write_user(uaddr, uaddr, sizeof(*uaddr));
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@ -46,7 +46,8 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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{
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int oldval = 0, ret = 0;
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pagefault_disable();
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if (!access_ok(uaddr, sizeof(u32)))
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return -EFAULT;
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switch (op) {
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case FUTEX_OP_SET:
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@ -73,8 +74,6 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret)
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*oval = oldval;
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@ -29,7 +29,6 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
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mm_segment_t old_fs;
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old_fs = enable_sacf_uaccess();
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pagefault_disable();
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switch (op) {
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case FUTEX_OP_SET:
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__futex_atomic_op("lr %2,%5\n",
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@ -54,7 +53,6 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
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default:
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ret = -ENOSYS;
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}
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pagefault_enable();
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disable_sacf_uaccess(old_fs);
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if (!ret)
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@ -34,8 +34,6 @@ static inline int arch_futex_atomic_op_inuser(int op, u32 oparg, int *oval,
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u32 oldval, newval, prev;
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int ret;
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pagefault_disable();
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do {
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ret = get_user(oldval, uaddr);
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@ -67,8 +65,6 @@ static inline int arch_futex_atomic_op_inuser(int op, u32 oparg, int *oval,
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ret = futex_atomic_cmpxchg_inatomic(&prev, uaddr, oldval, newval);
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} while (!ret && prev != oldval);
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pagefault_enable();
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if (!ret)
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*oval = oldval;
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@ -38,8 +38,6 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
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if (unlikely((((unsigned long) uaddr) & 0x3UL)))
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return -EINVAL;
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pagefault_disable();
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switch (op) {
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case FUTEX_OP_SET:
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__futex_cas_op("mov\t%4, %1", ret, oldval, uaddr, oparg);
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@ -60,8 +58,6 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret)
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*oval = oldval;
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@ -12,76 +12,103 @@
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#include <asm/processor.h>
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#include <asm/smap.h>
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#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
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asm volatile("\t" ASM_STAC "\n" \
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"1:\t" insn "\n" \
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"2:\t" ASM_CLAC "\n" \
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#define unsafe_atomic_op1(insn, oval, uaddr, oparg, label) \
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do { \
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int oldval = 0, ret; \
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asm volatile("1:\t" insn "\n" \
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"2:\n" \
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"\t.section .fixup,\"ax\"\n" \
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"3:\tmov\t%3, %1\n" \
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"\tjmp\t2b\n" \
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"\t.previous\n" \
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_ASM_EXTABLE_UA(1b, 3b) \
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: "=r" (oldval), "=r" (ret), "+m" (*uaddr) \
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: "i" (-EFAULT), "0" (oparg), "1" (0))
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: "i" (-EFAULT), "0" (oparg), "1" (0)); \
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if (ret) \
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goto label; \
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*oval = oldval; \
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} while(0)
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#define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
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asm volatile("\t" ASM_STAC "\n" \
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"1:\tmovl %2, %0\n" \
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"\tmovl\t%0, %3\n" \
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#define unsafe_atomic_op2(insn, oval, uaddr, oparg, label) \
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do { \
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int oldval = 0, ret, tem; \
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asm volatile("1:\tmovl %2, %0\n" \
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"2:\tmovl\t%0, %3\n" \
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"\t" insn "\n" \
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"2:\t" LOCK_PREFIX "cmpxchgl %3, %2\n" \
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"\tjnz\t1b\n" \
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"3:\t" ASM_CLAC "\n" \
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"3:\t" LOCK_PREFIX "cmpxchgl %3, %2\n" \
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"\tjnz\t2b\n" \
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"4:\n" \
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"\t.section .fixup,\"ax\"\n" \
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"4:\tmov\t%5, %1\n" \
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"\tjmp\t3b\n" \
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"5:\tmov\t%5, %1\n" \
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"\tjmp\t4b\n" \
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"\t.previous\n" \
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_ASM_EXTABLE_UA(1b, 4b) \
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_ASM_EXTABLE_UA(2b, 4b) \
|
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_ASM_EXTABLE_UA(1b, 5b) \
|
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_ASM_EXTABLE_UA(3b, 5b) \
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: "=&a" (oldval), "=&r" (ret), \
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"+m" (*uaddr), "=&r" (tem) \
|
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: "r" (oparg), "i" (-EFAULT), "1" (0))
|
||||
: "r" (oparg), "i" (-EFAULT), "1" (0)); \
|
||||
if (ret) \
|
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goto label; \
|
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*oval = oldval; \
|
||||
} while(0)
|
||||
|
||||
static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
|
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static __always_inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
|
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u32 __user *uaddr)
|
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{
|
||||
int oldval = 0, ret, tem;
|
||||
|
||||
pagefault_disable();
|
||||
if (!user_access_begin(uaddr, sizeof(u32)))
|
||||
return -EFAULT;
|
||||
|
||||
switch (op) {
|
||||
case FUTEX_OP_SET:
|
||||
__futex_atomic_op1("xchgl %0, %2", ret, oldval, uaddr, oparg);
|
||||
unsafe_atomic_op1("xchgl %0, %2", oval, uaddr, oparg, Efault);
|
||||
break;
|
||||
case FUTEX_OP_ADD:
|
||||
__futex_atomic_op1(LOCK_PREFIX "xaddl %0, %2", ret, oldval,
|
||||
uaddr, oparg);
|
||||
unsafe_atomic_op1(LOCK_PREFIX "xaddl %0, %2", oval,
|
||||
uaddr, oparg, Efault);
|
||||
break;
|
||||
case FUTEX_OP_OR:
|
||||
__futex_atomic_op2("orl %4, %3", ret, oldval, uaddr, oparg);
|
||||
unsafe_atomic_op2("orl %4, %3", oval, uaddr, oparg, Efault);
|
||||
break;
|
||||
case FUTEX_OP_ANDN:
|
||||
__futex_atomic_op2("andl %4, %3", ret, oldval, uaddr, ~oparg);
|
||||
unsafe_atomic_op2("andl %4, %3", oval, uaddr, ~oparg, Efault);
|
||||
break;
|
||||
case FUTEX_OP_XOR:
|
||||
__futex_atomic_op2("xorl %4, %3", ret, oldval, uaddr, oparg);
|
||||
unsafe_atomic_op2("xorl %4, %3", oval, uaddr, oparg, Efault);
|
||||
break;
|
||||
default:
|
||||
ret = -ENOSYS;
|
||||
user_access_end();
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
pagefault_enable();
|
||||
|
||||
if (!ret)
|
||||
*oval = oldval;
|
||||
|
||||
return ret;
|
||||
user_access_end();
|
||||
return 0;
|
||||
Efault:
|
||||
user_access_end();
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
static inline int futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
|
||||
u32 oldval, u32 newval)
|
||||
{
|
||||
return user_atomic_cmpxchg_inatomic(uval, uaddr, oldval, newval);
|
||||
int ret = 0;
|
||||
|
||||
if (!user_access_begin(uaddr, sizeof(u32)))
|
||||
return -EFAULT;
|
||||
asm volatile("\n"
|
||||
"1:\t" LOCK_PREFIX "cmpxchgl %4, %2\n"
|
||||
"2:\n"
|
||||
"\t.section .fixup, \"ax\"\n"
|
||||
"3:\tmov %3, %0\n"
|
||||
"\tjmp 2b\n"
|
||||
"\t.previous\n"
|
||||
_ASM_EXTABLE_UA(1b, 3b)
|
||||
: "+r" (ret), "=a" (oldval), "+m" (*uaddr)
|
||||
: "i" (-EFAULT), "r" (newval), "1" (oldval)
|
||||
: "memory"
|
||||
);
|
||||
user_access_end();
|
||||
*uval = oldval;
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@ -584,99 +584,6 @@ extern __must_check long strnlen_user(const char __user *str, long n);
|
||||
unsigned long __must_check clear_user(void __user *mem, unsigned long len);
|
||||
unsigned long __must_check __clear_user(void __user *mem, unsigned long len);
|
||||
|
||||
extern void __cmpxchg_wrong_size(void)
|
||||
__compiletime_error("Bad argument size for cmpxchg");
|
||||
|
||||
#define __user_atomic_cmpxchg_inatomic(uval, ptr, old, new, size) \
|
||||
({ \
|
||||
int __ret = 0; \
|
||||
__typeof__(*(ptr)) __old = (old); \
|
||||
__typeof__(*(ptr)) __new = (new); \
|
||||
__uaccess_begin_nospec(); \
|
||||
switch (size) { \
|
||||
case 1: \
|
||||
{ \
|
||||
asm volatile("\n" \
|
||||
"1:\t" LOCK_PREFIX "cmpxchgb %4, %2\n" \
|
||||
"2:\n" \
|
||||
"\t.section .fixup, \"ax\"\n" \
|
||||
"3:\tmov %3, %0\n" \
|
||||
"\tjmp 2b\n" \
|
||||
"\t.previous\n" \
|
||||
_ASM_EXTABLE_UA(1b, 3b) \
|
||||
: "+r" (__ret), "=a" (__old), "+m" (*(ptr)) \
|
||||
: "i" (-EFAULT), "q" (__new), "1" (__old) \
|
||||
: "memory" \
|
||||
); \
|
||||
break; \
|
||||
} \
|
||||
case 2: \
|
||||
{ \
|
||||
asm volatile("\n" \
|
||||
"1:\t" LOCK_PREFIX "cmpxchgw %4, %2\n" \
|
||||
"2:\n" \
|
||||
"\t.section .fixup, \"ax\"\n" \
|
||||
"3:\tmov %3, %0\n" \
|
||||
"\tjmp 2b\n" \
|
||||
"\t.previous\n" \
|
||||
_ASM_EXTABLE_UA(1b, 3b) \
|
||||
: "+r" (__ret), "=a" (__old), "+m" (*(ptr)) \
|
||||
: "i" (-EFAULT), "r" (__new), "1" (__old) \
|
||||
: "memory" \
|
||||
); \
|
||||
break; \
|
||||
} \
|
||||
case 4: \
|
||||
{ \
|
||||
asm volatile("\n" \
|
||||
"1:\t" LOCK_PREFIX "cmpxchgl %4, %2\n" \
|
||||
"2:\n" \
|
||||
"\t.section .fixup, \"ax\"\n" \
|
||||
"3:\tmov %3, %0\n" \
|
||||
"\tjmp 2b\n" \
|
||||
"\t.previous\n" \
|
||||
_ASM_EXTABLE_UA(1b, 3b) \
|
||||
: "+r" (__ret), "=a" (__old), "+m" (*(ptr)) \
|
||||
: "i" (-EFAULT), "r" (__new), "1" (__old) \
|
||||
: "memory" \
|
||||
); \
|
||||
break; \
|
||||
} \
|
||||
case 8: \
|
||||
{ \
|
||||
if (!IS_ENABLED(CONFIG_X86_64)) \
|
||||
__cmpxchg_wrong_size(); \
|
||||
\
|
||||
asm volatile("\n" \
|
||||
"1:\t" LOCK_PREFIX "cmpxchgq %4, %2\n" \
|
||||
"2:\n" \
|
||||
"\t.section .fixup, \"ax\"\n" \
|
||||
"3:\tmov %3, %0\n" \
|
||||
"\tjmp 2b\n" \
|
||||
"\t.previous\n" \
|
||||
_ASM_EXTABLE_UA(1b, 3b) \
|
||||
: "+r" (__ret), "=a" (__old), "+m" (*(ptr)) \
|
||||
: "i" (-EFAULT), "r" (__new), "1" (__old) \
|
||||
: "memory" \
|
||||
); \
|
||||
break; \
|
||||
} \
|
||||
default: \
|
||||
__cmpxchg_wrong_size(); \
|
||||
} \
|
||||
__uaccess_end(); \
|
||||
*(uval) = __old; \
|
||||
__ret; \
|
||||
})
|
||||
|
||||
#define user_atomic_cmpxchg_inatomic(uval, ptr, old, new) \
|
||||
({ \
|
||||
access_ok((ptr), sizeof(*(ptr))) ? \
|
||||
__user_atomic_cmpxchg_inatomic((uval), (ptr), \
|
||||
(old), (new), sizeof(*(ptr))) : \
|
||||
-EFAULT; \
|
||||
})
|
||||
|
||||
/*
|
||||
* movsl can be slow when source and dest are not both 8-byte aligned
|
||||
*/
|
||||
|
@ -72,7 +72,8 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
|
||||
#if XCHAL_HAVE_S32C1I || XCHAL_HAVE_EXCLUSIVE
|
||||
int oldval = 0, ret;
|
||||
|
||||
pagefault_disable();
|
||||
if (!access_ok(uaddr, sizeof(u32)))
|
||||
return -EFAULT;
|
||||
|
||||
switch (op) {
|
||||
case FUTEX_OP_SET:
|
||||
@ -99,8 +100,6 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
|
||||
ret = -ENOSYS;
|
||||
}
|
||||
|
||||
pagefault_enable();
|
||||
|
||||
if (!ret)
|
||||
*oval = oldval;
|
||||
|
||||
|
@ -34,7 +34,6 @@ arch_futex_atomic_op_inuser(int op, u32 oparg, int *oval, u32 __user *uaddr)
|
||||
u32 tmp;
|
||||
|
||||
preempt_disable();
|
||||
pagefault_disable();
|
||||
|
||||
ret = -EFAULT;
|
||||
if (unlikely(get_user(oldval, uaddr) != 0))
|
||||
@ -67,7 +66,6 @@ arch_futex_atomic_op_inuser(int op, u32 oparg, int *oval, u32 __user *uaddr)
|
||||
ret = -EFAULT;
|
||||
|
||||
out_pagefault_enable:
|
||||
pagefault_enable();
|
||||
preempt_enable();
|
||||
|
||||
if (ret == 0)
|
||||
|
@ -1665,10 +1665,9 @@ static int futex_atomic_op_inuser(unsigned int encoded_op, u32 __user *uaddr)
|
||||
oparg = 1 << oparg;
|
||||
}
|
||||
|
||||
if (!access_ok(uaddr, sizeof(u32)))
|
||||
return -EFAULT;
|
||||
|
||||
pagefault_disable();
|
||||
ret = arch_futex_atomic_op_inuser(op, oparg, &oldval, uaddr);
|
||||
pagefault_enable();
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
@ -478,6 +478,7 @@ static const char *uaccess_safe_builtin[] = {
|
||||
"__sanitizer_cov_trace_cmp2",
|
||||
"__sanitizer_cov_trace_cmp4",
|
||||
"__sanitizer_cov_trace_cmp8",
|
||||
"__sanitizer_cov_trace_switch",
|
||||
/* UBSAN */
|
||||
"ubsan_type_mismatch_common",
|
||||
"__ubsan_handle_type_mismatch",
|
||||
|
Loading…
Reference in New Issue
Block a user