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ath9k_hw: clean up tx completion interrupt handling
TXQ_FLAG_TXOKINT_ENABLE and TXQ_FLAG_TXERRINT_ENABLE are always set and used together, and they share the same bitmask in enum ath9k_tx_queue_flags. Simplify the code that tests for these flags. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -516,10 +516,10 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
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REG_WRITE(ah, AR_Q_DESC_CRCCHK, AR_Q_DESC_CRCCHK_EN);
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ath9k_hw_clear_queue_interrupts(ah, q);
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if (qi->tqi_qflags & TXQ_FLAG_TXOKINT_ENABLE)
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if (qi->tqi_qflags & TXQ_FLAG_TXINT_ENABLE) {
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ah->txok_interrupt_mask |= 1 << q;
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if (qi->tqi_qflags & TXQ_FLAG_TXERRINT_ENABLE)
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ah->txerr_interrupt_mask |= 1 << q;
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}
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if (qi->tqi_qflags & TXQ_FLAG_TXDESCINT_ENABLE)
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ah->txdesc_interrupt_mask |= 1 << q;
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if (qi->tqi_qflags & TXQ_FLAG_TXEOLINT_ENABLE)
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@ -743,8 +743,7 @@ int ath9k_hw_beaconq_setup(struct ath_hw *ah)
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qi.tqi_cwmax = 0;
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if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
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qi.tqi_qflags = TXQ_FLAG_TXOKINT_ENABLE |
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TXQ_FLAG_TXERRINT_ENABLE;
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qi.tqi_qflags = TXQ_FLAG_TXINT_ENABLE;
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return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);
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}
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@ -583,8 +583,7 @@ enum ath9k_tx_queue {
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#define ATH9K_WME_UPSD 4
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enum ath9k_tx_queue_flags {
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TXQ_FLAG_TXOKINT_ENABLE = 0x0001,
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TXQ_FLAG_TXERRINT_ENABLE = 0x0001,
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TXQ_FLAG_TXINT_ENABLE = 0x0001,
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TXQ_FLAG_TXDESCINT_ENABLE = 0x0002,
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TXQ_FLAG_TXEOLINT_ENABLE = 0x0004,
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TXQ_FLAG_TXURNINT_ENABLE = 0x0008,
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@ -1355,8 +1355,7 @@ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
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* based intr on the EOSP frames.
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*/
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if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
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qi.tqi_qflags = TXQ_FLAG_TXOKINT_ENABLE |
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TXQ_FLAG_TXERRINT_ENABLE;
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qi.tqi_qflags = TXQ_FLAG_TXINT_ENABLE;
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} else {
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if (qtype == ATH9K_TX_QUEUE_UAPSD)
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qi.tqi_qflags = TXQ_FLAG_TXDESCINT_ENABLE;
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