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mfd: Add support for S2MPA01 device
Add the necessary entries required for S2MPA01 multi-function device. While at it also convert whitespaces to tabs in core.h. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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8f695de515
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@ -26,6 +26,7 @@
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#include <linux/mfd/samsung/core.h>
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#include <linux/mfd/samsung/irq.h>
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#include <linux/mfd/samsung/rtc.h>
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#include <linux/mfd/samsung/s2mpa01.h>
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#include <linux/mfd/samsung/s2mps11.h>
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#include <linux/mfd/samsung/s2mps14.h>
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#include <linux/mfd/samsung/s5m8763.h>
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@ -80,21 +81,43 @@ static const struct mfd_cell s2mps14_devs[] = {
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}
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};
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static const struct mfd_cell s2mpa01_devs[] = {
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{
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.name = "s2mpa01-pmic",
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},
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};
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#ifdef CONFIG_OF
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static struct of_device_id sec_dt_match[] = {
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{ .compatible = "samsung,s5m8767-pmic",
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.data = (void *)S5M8767X,
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},
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{ .compatible = "samsung,s2mps11-pmic",
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}, {
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.compatible = "samsung,s2mps11-pmic",
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.data = (void *)S2MPS11X,
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},
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{ .compatible = "samsung,s2mps14-pmic",
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}, {
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.compatible = "samsung,s2mps14-pmic",
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.data = (void *)S2MPS14X,
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}, {
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.compatible = "samsung,s2mpa01-pmic",
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.data = (void *)S2MPA01,
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}, {
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/* Sentinel */
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},
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{},
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};
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#endif
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static bool s2mpa01_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case S2MPA01_REG_INT1M:
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case S2MPA01_REG_INT2M:
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case S2MPA01_REG_INT3M:
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return false;
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default:
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return true;
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}
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}
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static bool s2mps11_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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@ -125,6 +148,15 @@ static const struct regmap_config sec_regmap_config = {
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.val_bits = 8,
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};
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static const struct regmap_config s2mpa01_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = S2MPA01_REG_LDO_OVCB4,
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.volatile_reg = s2mpa01_volatile,
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.cache_type = REGCACHE_FLAT,
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};
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static const struct regmap_config s2mps11_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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@ -261,6 +293,9 @@ static int sec_pmic_probe(struct i2c_client *i2c,
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}
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switch (sec_pmic->device_type) {
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case S2MPA01:
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regmap = &s2mpa01_regmap_config;
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break;
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case S2MPS11X:
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regmap = &s2mps11_regmap_config;
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/*
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@ -332,6 +367,10 @@ static int sec_pmic_probe(struct i2c_client *i2c,
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ret = mfd_add_devices(sec_pmic->dev, -1, s5m8767_devs,
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ARRAY_SIZE(s5m8767_devs), NULL, 0, NULL);
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break;
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case S2MPA01:
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ret = mfd_add_devices(sec_pmic->dev, -1, s2mpa01_devs,
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ARRAY_SIZE(s2mpa01_devs), NULL, 0, NULL);
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break;
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case S2MPS11X:
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ret = mfd_add_devices(sec_pmic->dev, -1, s2mps11_devs,
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ARRAY_SIZE(s2mps11_devs), NULL, 0, NULL);
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@ -18,6 +18,7 @@ enum sec_device_type {
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S5M8751X,
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S5M8763X,
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S5M8767X,
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S2MPA01,
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S2MPS11X,
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S2MPS14X,
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};
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@ -93,7 +94,7 @@ struct sec_platform_data {
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int buck3_default_idx;
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int buck4_default_idx;
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int buck_ramp_delay;
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int buck_ramp_delay;
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int buck2_ramp_delay;
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int buck34_ramp_delay;
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@ -101,10 +102,15 @@ struct sec_platform_data {
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int buck16_ramp_delay;
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int buck7810_ramp_delay;
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int buck9_ramp_delay;
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int buck24_ramp_delay;
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int buck3_ramp_delay;
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int buck7_ramp_delay;
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int buck8910_ramp_delay;
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bool buck2_ramp_enable;
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bool buck3_ramp_enable;
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bool buck4_ramp_enable;
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bool buck1_ramp_enable;
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bool buck2_ramp_enable;
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bool buck3_ramp_enable;
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bool buck4_ramp_enable;
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bool buck6_ramp_enable;
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int buck2_init;
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@ -13,6 +13,56 @@
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#ifndef __LINUX_MFD_SEC_IRQ_H
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#define __LINUX_MFD_SEC_IRQ_H
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enum s2mpa01_irq {
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S2MPA01_IRQ_PWRONF,
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S2MPA01_IRQ_PWRONR,
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S2MPA01_IRQ_JIGONBF,
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S2MPA01_IRQ_JIGONBR,
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S2MPA01_IRQ_ACOKBF,
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S2MPA01_IRQ_ACOKBR,
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S2MPA01_IRQ_PWRON1S,
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S2MPA01_IRQ_MRB,
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S2MPA01_IRQ_RTC60S,
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S2MPA01_IRQ_RTCA1,
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S2MPA01_IRQ_RTCA0,
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S2MPA01_IRQ_SMPL,
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S2MPA01_IRQ_RTC1S,
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S2MPA01_IRQ_WTSR,
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S2MPA01_IRQ_INT120C,
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S2MPA01_IRQ_INT140C,
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S2MPA01_IRQ_LDO3_TSD,
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S2MPA01_IRQ_B16_TSD,
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S2MPA01_IRQ_B24_TSD,
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S2MPA01_IRQ_B35_TSD,
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S2MPA01_IRQ_NR,
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};
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#define S2MPA01_IRQ_PWRONF_MASK (1 << 0)
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#define S2MPA01_IRQ_PWRONR_MASK (1 << 1)
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#define S2MPA01_IRQ_JIGONBF_MASK (1 << 2)
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#define S2MPA01_IRQ_JIGONBR_MASK (1 << 3)
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#define S2MPA01_IRQ_ACOKBF_MASK (1 << 4)
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#define S2MPA01_IRQ_ACOKBR_MASK (1 << 5)
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#define S2MPA01_IRQ_PWRON1S_MASK (1 << 6)
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#define S2MPA01_IRQ_MRB_MASK (1 << 7)
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#define S2MPA01_IRQ_RTC60S_MASK (1 << 0)
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#define S2MPA01_IRQ_RTCA1_MASK (1 << 1)
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#define S2MPA01_IRQ_RTCA0_MASK (1 << 2)
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#define S2MPA01_IRQ_SMPL_MASK (1 << 3)
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#define S2MPA01_IRQ_RTC1S_MASK (1 << 4)
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#define S2MPA01_IRQ_WTSR_MASK (1 << 5)
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#define S2MPA01_IRQ_INT120C_MASK (1 << 0)
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#define S2MPA01_IRQ_INT140C_MASK (1 << 1)
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#define S2MPA01_IRQ_LDO3_TSD_MASK (1 << 2)
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#define S2MPA01_IRQ_B16_TSD_MASK (1 << 3)
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#define S2MPA01_IRQ_B24_TSD_MASK (1 << 4)
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#define S2MPA01_IRQ_B35_TSD_MASK (1 << 5)
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enum s2mps11_irq {
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S2MPS11_IRQ_PWRONF,
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S2MPS11_IRQ_PWRONR,
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192
include/linux/mfd/samsung/s2mpa01.h
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192
include/linux/mfd/samsung/s2mpa01.h
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@ -0,0 +1,192 @@
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/*
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* Copyright (c) 2013 Samsung Electronics Co., Ltd
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef __LINUX_MFD_S2MPA01_H
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#define __LINUX_MFD_S2MPA01_H
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/* S2MPA01 registers */
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enum s2mpa01_reg {
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S2MPA01_REG_ID,
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S2MPA01_REG_INT1,
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S2MPA01_REG_INT2,
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S2MPA01_REG_INT3,
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S2MPA01_REG_INT1M,
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S2MPA01_REG_INT2M,
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S2MPA01_REG_INT3M,
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S2MPA01_REG_ST1,
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S2MPA01_REG_ST2,
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S2MPA01_REG_PWRONSRC,
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S2MPA01_REG_OFFSRC,
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S2MPA01_REG_RTC_BUF,
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S2MPA01_REG_CTRL1,
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S2MPA01_REG_ETC_TEST,
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S2MPA01_REG_RSVD1,
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S2MPA01_REG_BU_CHG,
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S2MPA01_REG_RAMP1,
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S2MPA01_REG_RAMP2,
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S2MPA01_REG_LDO_DSCH1,
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S2MPA01_REG_LDO_DSCH2,
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S2MPA01_REG_LDO_DSCH3,
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S2MPA01_REG_LDO_DSCH4,
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S2MPA01_REG_OTP_ADRL,
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S2MPA01_REG_OTP_ADRH,
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S2MPA01_REG_OTP_DATA,
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S2MPA01_REG_MON1SEL,
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S2MPA01_REG_MON2SEL,
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S2MPA01_REG_LEE,
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S2MPA01_REG_RSVD2,
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S2MPA01_REG_RSVD3,
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S2MPA01_REG_RSVD4,
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S2MPA01_REG_RSVD5,
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S2MPA01_REG_RSVD6,
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S2MPA01_REG_TOP_RSVD,
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S2MPA01_REG_DVS_SEL,
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S2MPA01_REG_DVS_PTR,
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S2MPA01_REG_DVS_DATA,
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S2MPA01_REG_RSVD_NO,
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S2MPA01_REG_UVLO,
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S2MPA01_REG_LEE_NO,
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S2MPA01_REG_B1CTRL1,
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S2MPA01_REG_B1CTRL2,
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S2MPA01_REG_B2CTRL1,
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S2MPA01_REG_B2CTRL2,
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S2MPA01_REG_B3CTRL1,
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S2MPA01_REG_B3CTRL2,
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S2MPA01_REG_B4CTRL1,
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S2MPA01_REG_B4CTRL2,
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S2MPA01_REG_B5CTRL1,
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S2MPA01_REG_B5CTRL2,
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S2MPA01_REG_B5CTRL3,
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S2MPA01_REG_B5CTRL4,
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S2MPA01_REG_B5CTRL5,
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S2MPA01_REG_B5CTRL6,
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S2MPA01_REG_B6CTRL1,
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S2MPA01_REG_B6CTRL2,
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S2MPA01_REG_B7CTRL1,
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S2MPA01_REG_B7CTRL2,
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S2MPA01_REG_B8CTRL1,
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S2MPA01_REG_B8CTRL2,
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S2MPA01_REG_B9CTRL1,
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S2MPA01_REG_B9CTRL2,
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S2MPA01_REG_B10CTRL1,
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S2MPA01_REG_B10CTRL2,
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S2MPA01_REG_L1CTRL,
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S2MPA01_REG_L2CTRL,
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S2MPA01_REG_L3CTRL,
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S2MPA01_REG_L4CTRL,
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S2MPA01_REG_L5CTRL,
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S2MPA01_REG_L6CTRL,
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S2MPA01_REG_L7CTRL,
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S2MPA01_REG_L8CTRL,
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S2MPA01_REG_L9CTRL,
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S2MPA01_REG_L10CTRL,
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S2MPA01_REG_L11CTRL,
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S2MPA01_REG_L12CTRL,
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S2MPA01_REG_L13CTRL,
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S2MPA01_REG_L14CTRL,
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S2MPA01_REG_L15CTRL,
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S2MPA01_REG_L16CTRL,
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S2MPA01_REG_L17CTRL,
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S2MPA01_REG_L18CTRL,
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S2MPA01_REG_L19CTRL,
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S2MPA01_REG_L20CTRL,
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S2MPA01_REG_L21CTRL,
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S2MPA01_REG_L22CTRL,
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S2MPA01_REG_L23CTRL,
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S2MPA01_REG_L24CTRL,
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S2MPA01_REG_L25CTRL,
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S2MPA01_REG_L26CTRL,
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S2MPA01_REG_LDO_OVCB1,
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S2MPA01_REG_LDO_OVCB2,
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S2MPA01_REG_LDO_OVCB3,
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S2MPA01_REG_LDO_OVCB4,
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};
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/* S2MPA01 regulator ids */
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enum s2mpa01_regulators {
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S2MPA01_LDO1,
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S2MPA01_LDO2,
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S2MPA01_LDO3,
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S2MPA01_LDO4,
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S2MPA01_LDO5,
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S2MPA01_LDO6,
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S2MPA01_LDO7,
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S2MPA01_LDO8,
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S2MPA01_LDO9,
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S2MPA01_LDO10,
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S2MPA01_LDO11,
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S2MPA01_LDO12,
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S2MPA01_LDO13,
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S2MPA01_LDO14,
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S2MPA01_LDO15,
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S2MPA01_LDO16,
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S2MPA01_LDO17,
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S2MPA01_LDO18,
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S2MPA01_LDO19,
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S2MPA01_LDO20,
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S2MPA01_LDO21,
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S2MPA01_LDO22,
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S2MPA01_LDO23,
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S2MPA01_LDO24,
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S2MPA01_LDO25,
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S2MPA01_LDO26,
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S2MPA01_BUCK1,
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S2MPA01_BUCK2,
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S2MPA01_BUCK3,
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S2MPA01_BUCK4,
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S2MPA01_BUCK5,
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S2MPA01_BUCK6,
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S2MPA01_BUCK7,
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S2MPA01_BUCK8,
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S2MPA01_BUCK9,
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S2MPA01_BUCK10,
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S2MPA01_REGULATOR_MAX,
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};
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#define S2MPA01_BUCK_MIN1 600000
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#define S2MPA01_BUCK_MIN2 800000
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#define S2MPA01_BUCK_MIN3 1000000
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#define S2MPA01_BUCK_MIN4 1500000
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#define S2MPA01_LDO_MIN 800000
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#define S2MPA01_BUCK_STEP1 6250
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#define S2MPA01_BUCK_STEP2 12500
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#define S2MPA01_LDO_STEP1 50000
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#define S2MPA01_LDO_STEP2 25000
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#define S2MPA01_LDO_VSEL_MASK 0x3F
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#define S2MPA01_BUCK_VSEL_MASK 0xFF
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#define S2MPA01_ENABLE_MASK (0x03 << S2MPA01_ENABLE_SHIFT)
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#define S2MPA01_ENABLE_SHIFT 0x06
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#define S2MPA01_LDO_N_VOLTAGES (S2MPA01_LDO_VSEL_MASK + 1)
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#define S2MPA01_BUCK_N_VOLTAGES (S2MPA01_BUCK_VSEL_MASK + 1)
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#define S2MPA01_RAMP_DELAY 12500 /* uV/us */
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#define S2MPA01_BUCK16_RAMP_SHIFT 4
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#define S2MPA01_BUCK24_RAMP_SHIFT 6
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#define S2MPA01_BUCK3_RAMP_SHIFT 4
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#define S2MPA01_BUCK5_RAMP_SHIFT 6
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#define S2MPA01_BUCK7_RAMP_SHIFT 2
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#define S2MPA01_BUCK8910_RAMP_SHIFT 0
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#define S2MPA01_BUCK1_RAMP_EN_SHIFT 3
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#define S2MPA01_BUCK2_RAMP_EN_SHIFT 2
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#define S2MPA01_BUCK3_RAMP_EN_SHIFT 1
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#define S2MPA01_BUCK4_RAMP_EN_SHIFT 0
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#define S2MPA01_PMIC_EN_SHIFT 6
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#endif /*__LINUX_MFD_S2MPA01_H */
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