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sparc64: Add Niagara2 RNG driver.
With feedback and suggestions from Sam Ravnborg. Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
parent
432e8765f0
commit
ce08715021
@ -59,6 +59,19 @@ config HW_RANDOM_GEODE
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If unsure, say Y.
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config HW_RANDOM_N2RNG
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tristate "Niagara2 Random Number Generator support"
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depends on HW_RANDOM && SPARC64
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default HW_RANDOM
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---help---
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This driver provides kernel-side support for the Random Number
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Generator hardware found on Niagara2 cpus.
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To compile this driver as a module, choose M here: the
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module will be called n2-rng.
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If unsure, say Y.
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config HW_RANDOM_VIA
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tristate "VIA HW Random Number Generator support"
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depends on HW_RANDOM && X86_32
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@ -7,6 +7,8 @@ rng-core-y := core.o
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obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o
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obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o
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obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o
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obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o
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n2-rng-y := n2-drv.o n2-asm.o
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obj-$(CONFIG_HW_RANDOM_VIA) += via-rng.o
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obj-$(CONFIG_HW_RANDOM_IXP4XX) += ixp4xx-rng.o
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obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o
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79
drivers/char/hw_random/n2-asm.S
Normal file
79
drivers/char/hw_random/n2-asm.S
Normal file
@ -0,0 +1,79 @@
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/* n2-asm.S: Niagara2 RNG hypervisor call assembler.
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*
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* Copyright (C) 2008 David S. Miller <davem@davemloft.net>
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*/
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#include <linux/linkage.h>
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#include <asm/hypervisor.h>
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#include "n2rng.h"
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.text
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ENTRY(sun4v_rng_get_diag_ctl)
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mov HV_FAST_RNG_GET_DIAG_CTL, %o5
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ta HV_FAST_TRAP
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retl
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nop
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ENDPROC(sun4v_rng_get_diag_ctl)
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ENTRY(sun4v_rng_ctl_read_v1)
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mov %o1, %o3
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mov %o2, %o4
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mov HV_FAST_RNG_CTL_READ, %o5
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ta HV_FAST_TRAP
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stx %o1, [%o3]
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retl
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stx %o2, [%o4]
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ENDPROC(sun4v_rng_ctl_read_v1)
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ENTRY(sun4v_rng_ctl_read_v2)
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save %sp, -192, %sp
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mov %i0, %o0
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mov %i1, %o1
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mov HV_FAST_RNG_CTL_READ, %o5
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ta HV_FAST_TRAP
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stx %o1, [%i2]
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stx %o2, [%i3]
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stx %o3, [%i4]
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stx %o4, [%i5]
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ret
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restore %g0, %o0, %o0
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ENDPROC(sun4v_rng_ctl_read_v2)
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ENTRY(sun4v_rng_ctl_write_v1)
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mov %o3, %o4
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mov HV_FAST_RNG_CTL_WRITE, %o5
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ta HV_FAST_TRAP
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retl
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stx %o1, [%o4]
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ENDPROC(sun4v_rng_ctl_write_v1)
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ENTRY(sun4v_rng_ctl_write_v2)
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mov HV_FAST_RNG_CTL_WRITE, %o5
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ta HV_FAST_TRAP
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retl
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nop
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ENDPROC(sun4v_rng_ctl_write_v2)
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ENTRY(sun4v_rng_data_read_diag_v1)
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mov %o2, %o4
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mov HV_FAST_RNG_DATA_READ_DIAG, %o5
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ta HV_FAST_TRAP
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retl
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stx %o1, [%o4]
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ENDPROC(sun4v_rng_data_read_diag_v1)
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ENTRY(sun4v_rng_data_read_diag_v2)
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mov %o3, %o4
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mov HV_FAST_RNG_DATA_READ_DIAG, %o5
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ta HV_FAST_TRAP
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retl
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stx %o1, [%o4]
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ENDPROC(sun4v_rng_data_read_diag_v2)
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ENTRY(sun4v_rng_data_read)
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mov %o1, %o4
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mov HV_FAST_RNG_DATA_READ, %o5
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ta HV_FAST_TRAP
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retl
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stx %o1, [%o4]
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ENDPROC(sun4v_rng_data_read)
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771
drivers/char/hw_random/n2-drv.c
Normal file
771
drivers/char/hw_random/n2-drv.c
Normal file
@ -0,0 +1,771 @@
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/* n2-drv.c: Niagara-2 RNG driver.
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*
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* Copyright (C) 2008 David S. Miller <davem@davemloft.net>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/workqueue.h>
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#include <linux/preempt.h>
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#include <linux/hw_random.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <asm/hypervisor.h>
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#include "n2rng.h"
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#define DRV_MODULE_NAME "n2rng"
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#define PFX DRV_MODULE_NAME ": "
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#define DRV_MODULE_VERSION "0.1"
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#define DRV_MODULE_RELDATE "May 15, 2008"
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static char version[] __devinitdata =
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DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
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MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
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MODULE_DESCRIPTION("Niagara2 RNG driver");
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MODULE_LICENSE("GPL");
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MODULE_VERSION(DRV_MODULE_VERSION);
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/* The Niagara2 RNG provides a 64-bit read-only random number
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* register, plus a control register. Access to the RNG is
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* virtualized through the hypervisor so that both guests and control
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* nodes can access the device.
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*
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* The entropy source consists of raw entropy sources, each
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* constructed from a voltage controlled oscillator whose phase is
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* jittered by thermal noise sources.
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*
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* The oscillator in each of the three raw entropy sources run at
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* different frequencies. Normally, all three generator outputs are
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* gathered, xored together, and fed into a CRC circuit, the output of
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* which is the 64-bit read-only register.
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*
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* Some time is necessary for all the necessary entropy to build up
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* such that a full 64-bits of entropy are available in the register.
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* In normal operating mode (RNG_CTL_LFSR is set), the chip implements
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* an interlock which blocks register reads until sufficient entropy
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* is available.
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*
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* A control register is provided for adjusting various aspects of RNG
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* operation, and to enable diagnostic modes. Each of the three raw
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* entropy sources has an enable bit (RNG_CTL_ES{1,2,3}). Also
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* provided are fields for controlling the minimum time in cycles
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* between read accesses to the register (RNG_CTL_WAIT, this controls
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* the interlock described in the previous paragraph).
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*
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* The standard setting is to have the mode bit (RNG_CTL_LFSR) set,
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* all three entropy sources enabled, and the interlock time set
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* appropriately.
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*
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* The CRC polynomial used by the chip is:
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*
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* P(X) = x64 + x61 + x57 + x56 + x52 + x51 + x50 + x48 + x47 + x46 +
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* x43 + x42 + x41 + x39 + x38 + x37 + x35 + x32 + x28 + x25 +
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* x22 + x21 + x17 + x15 + x13 + x12 + x11 + x7 + x5 + x + 1
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*
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* The RNG_CTL_VCO value of each noise cell must be programmed
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* seperately. This is why 4 control register values must be provided
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* to the hypervisor. During a write, the hypervisor writes them all,
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* one at a time, to the actual RNG_CTL register. The first three
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* values are used to setup the desired RNG_CTL_VCO for each entropy
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* source, for example:
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*
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* control 0: (1 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES1
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* control 1: (2 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES2
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* control 2: (3 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES3
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*
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* And then the fourth value sets the final chip state and enables
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* desired.
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*/
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static int n2rng_hv_err_trans(unsigned long hv_err)
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{
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switch (hv_err) {
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case HV_EOK:
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return 0;
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case HV_EWOULDBLOCK:
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return -EAGAIN;
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case HV_ENOACCESS:
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return -EPERM;
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case HV_EIO:
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return -EIO;
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case HV_EBUSY:
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return -EBUSY;
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case HV_EBADALIGN:
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case HV_ENORADDR:
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return -EFAULT;
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default:
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return -EINVAL;
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}
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}
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static unsigned long n2rng_generic_read_control_v2(unsigned long ra,
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unsigned long unit)
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{
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unsigned long hv_err, state, ticks, watchdog_delta, watchdog_status;
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int block = 0, busy = 0;
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while (1) {
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hv_err = sun4v_rng_ctl_read_v2(ra, unit, &state,
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&ticks,
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&watchdog_delta,
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&watchdog_status);
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if (hv_err == HV_EOK)
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break;
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if (hv_err == HV_EBUSY) {
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if (++busy >= N2RNG_BUSY_LIMIT)
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break;
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udelay(1);
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} else if (hv_err == HV_EWOULDBLOCK) {
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if (++block >= N2RNG_BLOCK_LIMIT)
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break;
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__delay(ticks);
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} else
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break;
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}
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return hv_err;
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}
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/* In multi-socket situations, the hypervisor might need to
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* queue up the RNG control register write if it's for a unit
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* that is on a cpu socket other than the one we are executing on.
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*
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* We poll here waiting for a successful read of that control
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* register to make sure the write has been actually performed.
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*/
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static unsigned long n2rng_control_settle_v2(struct n2rng *np, int unit)
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{
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unsigned long ra = __pa(&np->scratch_control[0]);
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return n2rng_generic_read_control_v2(ra, unit);
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}
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static unsigned long n2rng_write_ctl_one(struct n2rng *np, int unit,
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unsigned long state,
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unsigned long control_ra,
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unsigned long watchdog_timeout,
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unsigned long *ticks)
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{
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unsigned long hv_err;
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if (np->hvapi_major == 1) {
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hv_err = sun4v_rng_ctl_write_v1(control_ra, state,
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watchdog_timeout, ticks);
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} else {
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hv_err = sun4v_rng_ctl_write_v2(control_ra, state,
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watchdog_timeout, unit);
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if (hv_err == HV_EOK)
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hv_err = n2rng_control_settle_v2(np, unit);
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*ticks = N2RNG_ACCUM_CYCLES_DEFAULT;
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}
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return hv_err;
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}
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static int n2rng_generic_read_data(unsigned long data_ra)
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{
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unsigned long ticks, hv_err;
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int block = 0, hcheck = 0;
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while (1) {
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hv_err = sun4v_rng_data_read(data_ra, &ticks);
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if (hv_err == HV_EOK)
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return 0;
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if (hv_err == HV_EWOULDBLOCK) {
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if (++block >= N2RNG_BLOCK_LIMIT)
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return -EWOULDBLOCK;
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__delay(ticks);
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} else if (hv_err == HV_ENOACCESS) {
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return -EPERM;
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} else if (hv_err == HV_EIO) {
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if (++hcheck >= N2RNG_HCHECK_LIMIT)
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return -EIO;
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udelay(10000);
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} else
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return -ENODEV;
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}
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}
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static unsigned long n2rng_read_diag_data_one(struct n2rng *np,
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unsigned long unit,
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unsigned long data_ra,
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unsigned long data_len,
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unsigned long *ticks)
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{
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unsigned long hv_err;
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if (np->hvapi_major == 1) {
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hv_err = sun4v_rng_data_read_diag_v1(data_ra, data_len, ticks);
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} else {
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hv_err = sun4v_rng_data_read_diag_v2(data_ra, data_len,
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unit, ticks);
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if (!*ticks)
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*ticks = N2RNG_ACCUM_CYCLES_DEFAULT;
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}
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return hv_err;
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}
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static int n2rng_generic_read_diag_data(struct n2rng *np,
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unsigned long unit,
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unsigned long data_ra,
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unsigned long data_len)
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{
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unsigned long ticks, hv_err;
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int block = 0;
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while (1) {
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hv_err = n2rng_read_diag_data_one(np, unit,
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data_ra, data_len,
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&ticks);
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if (hv_err == HV_EOK)
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return 0;
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if (hv_err == HV_EWOULDBLOCK) {
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if (++block >= N2RNG_BLOCK_LIMIT)
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return -EWOULDBLOCK;
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__delay(ticks);
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} else if (hv_err == HV_ENOACCESS) {
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return -EPERM;
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} else if (hv_err == HV_EIO) {
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return -EIO;
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} else
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return -ENODEV;
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}
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}
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static int n2rng_generic_write_control(struct n2rng *np,
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unsigned long control_ra,
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unsigned long unit,
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unsigned long state)
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{
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unsigned long hv_err, ticks;
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int block = 0, busy = 0;
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while (1) {
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hv_err = n2rng_write_ctl_one(np, unit, state, control_ra,
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np->wd_timeo, &ticks);
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if (hv_err == HV_EOK)
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return 0;
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if (hv_err == HV_EWOULDBLOCK) {
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if (++block >= N2RNG_BLOCK_LIMIT)
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return -EWOULDBLOCK;
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__delay(ticks);
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} else if (hv_err == HV_EBUSY) {
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if (++busy >= N2RNG_BUSY_LIMIT)
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return -EBUSY;
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udelay(1);
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} else
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return -ENODEV;
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}
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}
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/* Just try to see if we can successfully access the control register
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* of the RNG on the domain on which we are currently executing.
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*/
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static int n2rng_try_read_ctl(struct n2rng *np)
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{
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unsigned long hv_err;
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unsigned long x;
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if (np->hvapi_major == 1) {
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hv_err = sun4v_rng_get_diag_ctl();
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} else {
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/* We purposefully give invalid arguments, HV_NOACCESS
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* is higher priority than the errors we'd get from
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* these other cases, and that's the error we are
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* truly interested in.
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*/
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hv_err = sun4v_rng_ctl_read_v2(0UL, ~0UL, &x, &x, &x, &x);
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switch (hv_err) {
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case HV_EWOULDBLOCK:
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case HV_ENOACCESS:
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break;
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default:
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hv_err = HV_EOK;
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break;
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}
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}
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return n2rng_hv_err_trans(hv_err);
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}
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#define CONTROL_DEFAULT_BASE \
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((2 << RNG_CTL_ASEL_SHIFT) | \
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(N2RNG_ACCUM_CYCLES_DEFAULT << RNG_CTL_WAIT_SHIFT) | \
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RNG_CTL_LFSR)
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#define CONTROL_DEFAULT_0 \
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(CONTROL_DEFAULT_BASE | \
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(1 << RNG_CTL_VCO_SHIFT) | \
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RNG_CTL_ES1)
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#define CONTROL_DEFAULT_1 \
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(CONTROL_DEFAULT_BASE | \
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(2 << RNG_CTL_VCO_SHIFT) | \
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RNG_CTL_ES2)
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#define CONTROL_DEFAULT_2 \
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(CONTROL_DEFAULT_BASE | \
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(3 << RNG_CTL_VCO_SHIFT) | \
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RNG_CTL_ES3)
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#define CONTROL_DEFAULT_3 \
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(CONTROL_DEFAULT_BASE | \
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RNG_CTL_ES1 | RNG_CTL_ES2 | RNG_CTL_ES3)
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static void n2rng_control_swstate_init(struct n2rng *np)
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{
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int i;
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np->flags |= N2RNG_FLAG_CONTROL;
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np->health_check_sec = N2RNG_HEALTH_CHECK_SEC_DEFAULT;
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np->accum_cycles = N2RNG_ACCUM_CYCLES_DEFAULT;
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np->wd_timeo = N2RNG_WD_TIMEO_DEFAULT;
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for (i = 0; i < np->num_units; i++) {
|
||||
struct n2rng_unit *up = &np->units[i];
|
||||
|
||||
up->control[0] = CONTROL_DEFAULT_0;
|
||||
up->control[1] = CONTROL_DEFAULT_1;
|
||||
up->control[2] = CONTROL_DEFAULT_2;
|
||||
up->control[3] = CONTROL_DEFAULT_3;
|
||||
}
|
||||
|
||||
np->hv_state = HV_RNG_STATE_UNCONFIGURED;
|
||||
}
|
||||
|
||||
static int n2rng_grab_diag_control(struct n2rng *np)
|
||||
{
|
||||
int i, busy_count, err = -ENODEV;
|
||||
|
||||
busy_count = 0;
|
||||
for (i = 0; i < 100; i++) {
|
||||
err = n2rng_try_read_ctl(np);
|
||||
if (err != -EAGAIN)
|
||||
break;
|
||||
|
||||
if (++busy_count > 100) {
|
||||
dev_err(&np->op->dev,
|
||||
"Grab diag control timeout.\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
udelay(1);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int n2rng_init_control(struct n2rng *np)
|
||||
{
|
||||
int err = n2rng_grab_diag_control(np);
|
||||
|
||||
/* Not in the control domain, that's OK we are only a consumer
|
||||
* of the RNG data, we don't setup and program it.
|
||||
*/
|
||||
if (err == -EPERM)
|
||||
return 0;
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
n2rng_control_swstate_init(np);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int n2rng_data_read(struct hwrng *rng, u32 *data)
|
||||
{
|
||||
struct n2rng *np = (struct n2rng *) rng->priv;
|
||||
unsigned long ra = __pa(&np->test_data);
|
||||
int len;
|
||||
|
||||
if (!(np->flags & N2RNG_FLAG_READY)) {
|
||||
len = 0;
|
||||
} else if (np->flags & N2RNG_FLAG_BUFFER_VALID) {
|
||||
np->flags &= ~N2RNG_FLAG_BUFFER_VALID;
|
||||
*data = np->buffer;
|
||||
len = 4;
|
||||
} else {
|
||||
int err = n2rng_generic_read_data(ra);
|
||||
if (!err) {
|
||||
np->buffer = np->test_data >> 32;
|
||||
*data = np->test_data & 0xffffffff;
|
||||
len = 4;
|
||||
} else {
|
||||
dev_err(&np->op->dev, "RNG error, restesting\n");
|
||||
np->flags &= ~N2RNG_FLAG_READY;
|
||||
if (!(np->flags & N2RNG_FLAG_SHUTDOWN))
|
||||
schedule_delayed_work(&np->work, 0);
|
||||
len = 0;
|
||||
}
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
/* On a guest node, just make sure we can read random data properly.
|
||||
* If a control node reboots or reloads it's n2rng driver, this won't
|
||||
* work during that time. So we have to keep probing until the device
|
||||
* becomes usable.
|
||||
*/
|
||||
static int n2rng_guest_check(struct n2rng *np)
|
||||
{
|
||||
unsigned long ra = __pa(&np->test_data);
|
||||
|
||||
return n2rng_generic_read_data(ra);
|
||||
}
|
||||
|
||||
static int n2rng_entropy_diag_read(struct n2rng *np, unsigned long unit,
|
||||
u64 *pre_control, u64 pre_state,
|
||||
u64 *buffer, unsigned long buf_len,
|
||||
u64 *post_control, u64 post_state)
|
||||
{
|
||||
unsigned long post_ctl_ra = __pa(post_control);
|
||||
unsigned long pre_ctl_ra = __pa(pre_control);
|
||||
unsigned long buffer_ra = __pa(buffer);
|
||||
int err;
|
||||
|
||||
err = n2rng_generic_write_control(np, pre_ctl_ra, unit, pre_state);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = n2rng_generic_read_diag_data(np, unit,
|
||||
buffer_ra, buf_len);
|
||||
|
||||
(void) n2rng_generic_write_control(np, post_ctl_ra, unit,
|
||||
post_state);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static u64 advance_polynomial(u64 poly, u64 val, int count)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < count; i++) {
|
||||
int highbit_set = ((s64)val < 0);
|
||||
|
||||
val <<= 1;
|
||||
if (highbit_set)
|
||||
val ^= poly;
|
||||
}
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
static int n2rng_test_buffer_find(struct n2rng *np, u64 val)
|
||||
{
|
||||
int i, count = 0;
|
||||
|
||||
/* Purposefully skip over the first word. */
|
||||
for (i = 1; i < SELFTEST_BUFFER_WORDS; i++) {
|
||||
if (np->test_buffer[i] == val)
|
||||
count++;
|
||||
}
|
||||
return count;
|
||||
}
|
||||
|
||||
static void n2rng_dump_test_buffer(struct n2rng *np)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < SELFTEST_BUFFER_WORDS; i++)
|
||||
dev_err(&np->op->dev, "Test buffer slot %d [0x%016lx]\n",
|
||||
i, np->test_buffer[i]);
|
||||
}
|
||||
|
||||
static int n2rng_check_selftest_buffer(struct n2rng *np, unsigned long unit)
|
||||
{
|
||||
u64 val = SELFTEST_VAL;
|
||||
int err, matches, limit;
|
||||
|
||||
matches = 0;
|
||||
for (limit = 0; limit < SELFTEST_LOOPS_MAX; limit++) {
|
||||
matches += n2rng_test_buffer_find(np, val);
|
||||
if (matches >= SELFTEST_MATCH_GOAL)
|
||||
break;
|
||||
val = advance_polynomial(SELFTEST_POLY, val, 1);
|
||||
}
|
||||
|
||||
err = 0;
|
||||
if (limit >= SELFTEST_LOOPS_MAX) {
|
||||
err = -ENODEV;
|
||||
dev_err(&np->op->dev, "Selftest failed on unit %lu\n", unit);
|
||||
n2rng_dump_test_buffer(np);
|
||||
} else
|
||||
dev_info(&np->op->dev, "Selftest passed on unit %lu\n", unit);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int n2rng_control_selftest(struct n2rng *np, unsigned long unit)
|
||||
{
|
||||
int err;
|
||||
|
||||
np->test_control[0] = (0x2 << RNG_CTL_ASEL_SHIFT);
|
||||
np->test_control[1] = (0x2 << RNG_CTL_ASEL_SHIFT);
|
||||
np->test_control[2] = (0x2 << RNG_CTL_ASEL_SHIFT);
|
||||
np->test_control[3] = ((0x2 << RNG_CTL_ASEL_SHIFT) |
|
||||
RNG_CTL_LFSR |
|
||||
((SELFTEST_TICKS - 2) << RNG_CTL_WAIT_SHIFT));
|
||||
|
||||
|
||||
err = n2rng_entropy_diag_read(np, unit, np->test_control,
|
||||
HV_RNG_STATE_HEALTHCHECK,
|
||||
np->test_buffer,
|
||||
sizeof(np->test_buffer),
|
||||
&np->units[unit].control[0],
|
||||
np->hv_state);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
return n2rng_check_selftest_buffer(np, unit);
|
||||
}
|
||||
|
||||
static int n2rng_control_check(struct n2rng *np)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < np->num_units; i++) {
|
||||
int err = n2rng_control_selftest(np, i);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* The sanity checks passed, install the final configuration into the
|
||||
* chip, it's ready to use.
|
||||
*/
|
||||
static int n2rng_control_configure_units(struct n2rng *np)
|
||||
{
|
||||
int unit, err;
|
||||
|
||||
err = 0;
|
||||
for (unit = 0; unit < np->num_units; unit++) {
|
||||
struct n2rng_unit *up = &np->units[unit];
|
||||
unsigned long ctl_ra = __pa(&up->control[0]);
|
||||
int esrc;
|
||||
u64 base;
|
||||
|
||||
base = ((np->accum_cycles << RNG_CTL_WAIT_SHIFT) |
|
||||
(2 << RNG_CTL_ASEL_SHIFT) |
|
||||
RNG_CTL_LFSR);
|
||||
|
||||
/* XXX This isn't the best. We should fetch a bunch
|
||||
* XXX of words using each entropy source combined XXX
|
||||
* with each VCO setting, and see which combinations
|
||||
* XXX give the best random data.
|
||||
*/
|
||||
for (esrc = 0; esrc < 3; esrc++)
|
||||
up->control[esrc] = base |
|
||||
(esrc << RNG_CTL_VCO_SHIFT) |
|
||||
(RNG_CTL_ES1 << esrc);
|
||||
|
||||
up->control[3] = base |
|
||||
(RNG_CTL_ES1 | RNG_CTL_ES2 | RNG_CTL_ES3);
|
||||
|
||||
err = n2rng_generic_write_control(np, ctl_ra, unit,
|
||||
HV_RNG_STATE_CONFIGURED);
|
||||
if (err)
|
||||
break;
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static void n2rng_work(struct work_struct *work)
|
||||
{
|
||||
struct n2rng *np = container_of(work, struct n2rng, work.work);
|
||||
int err = 0;
|
||||
|
||||
if (!(np->flags & N2RNG_FLAG_CONTROL)) {
|
||||
err = n2rng_guest_check(np);
|
||||
} else {
|
||||
preempt_disable();
|
||||
err = n2rng_control_check(np);
|
||||
preempt_enable();
|
||||
|
||||
if (!err)
|
||||
err = n2rng_control_configure_units(np);
|
||||
}
|
||||
|
||||
if (!err) {
|
||||
np->flags |= N2RNG_FLAG_READY;
|
||||
dev_info(&np->op->dev, "RNG ready\n");
|
||||
}
|
||||
|
||||
if (err && !(np->flags & N2RNG_FLAG_SHUTDOWN))
|
||||
schedule_delayed_work(&np->work, HZ * 2);
|
||||
}
|
||||
|
||||
static void __devinit n2rng_driver_version(void)
|
||||
{
|
||||
static int n2rng_version_printed;
|
||||
|
||||
if (n2rng_version_printed++ == 0)
|
||||
pr_info("%s", version);
|
||||
}
|
||||
|
||||
static int __devinit n2rng_probe(struct of_device *op,
|
||||
const struct of_device_id *match)
|
||||
{
|
||||
int victoria_falls = (match->data != NULL);
|
||||
int err = -ENOMEM;
|
||||
struct n2rng *np;
|
||||
|
||||
n2rng_driver_version();
|
||||
|
||||
np = kzalloc(sizeof(*np), GFP_KERNEL);
|
||||
if (!np)
|
||||
goto out;
|
||||
np->op = op;
|
||||
|
||||
INIT_DELAYED_WORK(&np->work, n2rng_work);
|
||||
|
||||
if (victoria_falls)
|
||||
np->flags |= N2RNG_FLAG_VF;
|
||||
|
||||
err = -ENODEV;
|
||||
np->hvapi_major = 2;
|
||||
if (sun4v_hvapi_register(HV_GRP_RNG,
|
||||
np->hvapi_major,
|
||||
&np->hvapi_minor)) {
|
||||
np->hvapi_major = 1;
|
||||
if (sun4v_hvapi_register(HV_GRP_RNG,
|
||||
np->hvapi_major,
|
||||
&np->hvapi_minor)) {
|
||||
dev_err(&op->dev, "Cannot register suitable "
|
||||
"HVAPI version.\n");
|
||||
goto out_free;
|
||||
}
|
||||
}
|
||||
|
||||
if (np->flags & N2RNG_FLAG_VF) {
|
||||
if (np->hvapi_major < 2) {
|
||||
dev_err(&op->dev, "VF RNG requires HVAPI major "
|
||||
"version 2 or later, got %lu\n",
|
||||
np->hvapi_major);
|
||||
goto out_hvapi_unregister;
|
||||
}
|
||||
np->num_units = of_getintprop_default(op->node,
|
||||
"rng-#units", 0);
|
||||
if (!np->num_units) {
|
||||
dev_err(&op->dev, "VF RNG lacks rng-#units property\n");
|
||||
goto out_hvapi_unregister;
|
||||
}
|
||||
} else
|
||||
np->num_units = 1;
|
||||
|
||||
dev_info(&op->dev, "Registered RNG HVAPI major %lu minor %lu\n",
|
||||
np->hvapi_major, np->hvapi_minor);
|
||||
|
||||
np->units = kzalloc(sizeof(struct n2rng_unit) * np->num_units,
|
||||
GFP_KERNEL);
|
||||
err = -ENOMEM;
|
||||
if (!np->units)
|
||||
goto out_hvapi_unregister;
|
||||
|
||||
err = n2rng_init_control(np);
|
||||
if (err)
|
||||
goto out_free_units;
|
||||
|
||||
dev_info(&op->dev, "Found %s RNG, units: %d\n",
|
||||
((np->flags & N2RNG_FLAG_VF) ?
|
||||
"Victoria Falls" : "Niagara2"),
|
||||
np->num_units);
|
||||
|
||||
np->hwrng.name = "n2rng";
|
||||
np->hwrng.data_read = n2rng_data_read;
|
||||
np->hwrng.priv = (unsigned long) np;
|
||||
|
||||
err = hwrng_register(&np->hwrng);
|
||||
if (err)
|
||||
goto out_free_units;
|
||||
|
||||
dev_set_drvdata(&op->dev, np);
|
||||
|
||||
schedule_delayed_work(&np->work, 0);
|
||||
|
||||
return 0;
|
||||
|
||||
out_free_units:
|
||||
kfree(np->units);
|
||||
np->units = NULL;
|
||||
|
||||
out_hvapi_unregister:
|
||||
sun4v_hvapi_unregister(HV_GRP_RNG);
|
||||
|
||||
out_free:
|
||||
kfree(np);
|
||||
out:
|
||||
return err;
|
||||
}
|
||||
|
||||
static int __devexit n2rng_remove(struct of_device *op)
|
||||
{
|
||||
struct n2rng *np = dev_get_drvdata(&op->dev);
|
||||
|
||||
np->flags |= N2RNG_FLAG_SHUTDOWN;
|
||||
|
||||
cancel_delayed_work_sync(&np->work);
|
||||
|
||||
hwrng_unregister(&np->hwrng);
|
||||
|
||||
sun4v_hvapi_unregister(HV_GRP_RNG);
|
||||
|
||||
kfree(np->units);
|
||||
np->units = NULL;
|
||||
|
||||
kfree(np);
|
||||
|
||||
dev_set_drvdata(&op->dev, NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct of_device_id n2rng_match[] = {
|
||||
{
|
||||
.name = "random-number-generator",
|
||||
.compatible = "SUNW,n2-rng",
|
||||
},
|
||||
{
|
||||
.name = "random-number-generator",
|
||||
.compatible = "SUNW,vf-rng",
|
||||
.data = (void *) 1,
|
||||
},
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, n2rng_match);
|
||||
|
||||
static struct of_platform_driver n2rng_driver = {
|
||||
.name = "n2rng",
|
||||
.match_table = n2rng_match,
|
||||
.probe = n2rng_probe,
|
||||
.remove = __devexit_p(n2rng_remove),
|
||||
};
|
||||
|
||||
static int __init n2rng_init(void)
|
||||
{
|
||||
return of_register_driver(&n2rng_driver, &of_bus_type);
|
||||
}
|
||||
|
||||
static void __exit n2rng_exit(void)
|
||||
{
|
||||
of_unregister_driver(&n2rng_driver);
|
||||
}
|
||||
|
||||
module_init(n2rng_init);
|
||||
module_exit(n2rng_exit);
|
||||
118
drivers/char/hw_random/n2rng.h
Normal file
118
drivers/char/hw_random/n2rng.h
Normal file
@ -0,0 +1,118 @@
|
||||
/* n2rng.h: Niagara2 RNG defines.
|
||||
*
|
||||
* Copyright (C) 2008 David S. Miller <davem@davemloft.net>
|
||||
*/
|
||||
|
||||
#ifndef _N2RNG_H
|
||||
#define _N2RNG_H
|
||||
|
||||
#define RNG_CTL_WAIT 0x0000000001fffe00ULL /* Minimum wait time */
|
||||
#define RNG_CTL_WAIT_SHIFT 9
|
||||
#define RNG_CTL_BYPASS 0x0000000000000100ULL /* VCO voltage source */
|
||||
#define RNG_CTL_VCO 0x00000000000000c0ULL /* VCO rate control */
|
||||
#define RNG_CTL_VCO_SHIFT 6
|
||||
#define RNG_CTL_ASEL 0x0000000000000030ULL /* Analog MUX select */
|
||||
#define RNG_CTL_ASEL_SHIFT 4
|
||||
#define RNG_CTL_LFSR 0x0000000000000008ULL /* Use LFSR or plain shift */
|
||||
#define RNG_CTL_ES3 0x0000000000000004ULL /* Enable entropy source 3 */
|
||||
#define RNG_CTL_ES2 0x0000000000000002ULL /* Enable entropy source 2 */
|
||||
#define RNG_CTL_ES1 0x0000000000000001ULL /* Enable entropy source 1 */
|
||||
|
||||
#define HV_FAST_RNG_GET_DIAG_CTL 0x130
|
||||
#define HV_FAST_RNG_CTL_READ 0x131
|
||||
#define HV_FAST_RNG_CTL_WRITE 0x132
|
||||
#define HV_FAST_RNG_DATA_READ_DIAG 0x133
|
||||
#define HV_FAST_RNG_DATA_READ 0x134
|
||||
|
||||
#define HV_RNG_STATE_UNCONFIGURED 0
|
||||
#define HV_RNG_STATE_CONFIGURED 1
|
||||
#define HV_RNG_STATE_HEALTHCHECK 2
|
||||
#define HV_RNG_STATE_ERROR 3
|
||||
|
||||
#define HV_RNG_NUM_CONTROL 4
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
extern unsigned long sun4v_rng_get_diag_ctl(void);
|
||||
extern unsigned long sun4v_rng_ctl_read_v1(unsigned long ctl_regs_ra,
|
||||
unsigned long *state,
|
||||
unsigned long *tick_delta);
|
||||
extern unsigned long sun4v_rng_ctl_read_v2(unsigned long ctl_regs_ra,
|
||||
unsigned long unit,
|
||||
unsigned long *state,
|
||||
unsigned long *tick_delta,
|
||||
unsigned long *watchdog,
|
||||
unsigned long *write_status);
|
||||
extern unsigned long sun4v_rng_ctl_write_v1(unsigned long ctl_regs_ra,
|
||||
unsigned long state,
|
||||
unsigned long write_timeout,
|
||||
unsigned long *tick_delta);
|
||||
extern unsigned long sun4v_rng_ctl_write_v2(unsigned long ctl_regs_ra,
|
||||
unsigned long state,
|
||||
unsigned long write_timeout,
|
||||
unsigned long unit);
|
||||
extern unsigned long sun4v_rng_data_read_diag_v1(unsigned long data_ra,
|
||||
unsigned long len,
|
||||
unsigned long *tick_delta);
|
||||
extern unsigned long sun4v_rng_data_read_diag_v2(unsigned long data_ra,
|
||||
unsigned long len,
|
||||
unsigned long unit,
|
||||
unsigned long *tick_delta);
|
||||
extern unsigned long sun4v_rng_data_read(unsigned long data_ra,
|
||||
unsigned long *tick_delta);
|
||||
|
||||
struct n2rng_unit {
|
||||
u64 control[HV_RNG_NUM_CONTROL];
|
||||
};
|
||||
|
||||
struct n2rng {
|
||||
struct of_device *op;
|
||||
|
||||
unsigned long flags;
|
||||
#define N2RNG_FLAG_VF 0x00000001 /* Victoria Falls RNG, else N2 */
|
||||
#define N2RNG_FLAG_CONTROL 0x00000002 /* Operating in control domain */
|
||||
#define N2RNG_FLAG_READY 0x00000008 /* Ready for hw-rng layer */
|
||||
#define N2RNG_FLAG_SHUTDOWN 0x00000010 /* Driver unregistering */
|
||||
#define N2RNG_FLAG_BUFFER_VALID 0x00000020 /* u32 buffer holds valid data */
|
||||
|
||||
int num_units;
|
||||
struct n2rng_unit *units;
|
||||
|
||||
struct hwrng hwrng;
|
||||
u32 buffer;
|
||||
|
||||
/* Registered hypervisor group API major and minor version. */
|
||||
unsigned long hvapi_major;
|
||||
unsigned long hvapi_minor;
|
||||
|
||||
struct delayed_work work;
|
||||
|
||||
unsigned long hv_state; /* HV_RNG_STATE_foo */
|
||||
|
||||
unsigned long health_check_sec;
|
||||
unsigned long accum_cycles;
|
||||
unsigned long wd_timeo;
|
||||
#define N2RNG_HEALTH_CHECK_SEC_DEFAULT 0
|
||||
#define N2RNG_ACCUM_CYCLES_DEFAULT 2048
|
||||
#define N2RNG_WD_TIMEO_DEFAULT 0
|
||||
|
||||
u64 scratch_control[HV_RNG_NUM_CONTROL];
|
||||
|
||||
#define SELFTEST_TICKS 38859
|
||||
#define SELFTEST_VAL ((u64)0xB8820C7BD387E32C)
|
||||
#define SELFTEST_POLY ((u64)0x231DCEE91262B8A3)
|
||||
#define SELFTEST_MATCH_GOAL 6
|
||||
#define SELFTEST_LOOPS_MAX 40000
|
||||
#define SELFTEST_BUFFER_WORDS 8
|
||||
|
||||
u64 test_data;
|
||||
u64 test_control[HV_RNG_NUM_CONTROL];
|
||||
u64 test_buffer[SELFTEST_BUFFER_WORDS];
|
||||
};
|
||||
|
||||
#define N2RNG_BLOCK_LIMIT 60000
|
||||
#define N2RNG_BUSY_LIMIT 100
|
||||
#define N2RNG_HCHECK_LIMIT 100
|
||||
|
||||
#endif /* !(__ASSEMBLY__) */
|
||||
|
||||
#endif /* _N2RNG_H */
|
||||
Loading…
Reference in New Issue
Block a user