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clk: imx: scu: Add A53 frequency scaling support
Add i.MX8QM cpufreq support for A53 cluster. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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@ -273,7 +273,7 @@ static int clk_scu_atf_set_cpu_rate(struct clk_hw *hw, unsigned long rate,
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struct arm_smccc_res res;
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unsigned long cluster_id;
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if (clk->rsrc_id == IMX_SC_R_A35)
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if (clk->rsrc_id == IMX_SC_R_A35 || clk->rsrc_id == IMX_SC_R_A53)
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cluster_id = 0;
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else
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return -EINVAL;
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@ -449,7 +449,7 @@ struct clk_hw *__imx_clk_scu(struct device *dev, const char *name,
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init.name = name;
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init.ops = &clk_scu_ops;
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if (rsrc_id == IMX_SC_R_A35)
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if (rsrc_id == IMX_SC_R_A35 || rsrc_id == IMX_SC_R_A53)
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init.ops = &clk_scu_cpu_ops;
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else if (rsrc_id == IMX_SC_R_PI_0_PLL)
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init.ops = &clk_scu_pi_ops;
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