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Renesas ARM Based SoC DT Updates for v5.3

Browse Source 
* Renesas SoC based boards
   - Use ip=on for bootargs
 
 * Renesas R-Car Gen 2 SOC based boards
   - Configure PMIC IRQ pinmux
 
 * R-Car V2H (r8a7792) SoC
   - Describe CMT devices in DT
 
 * RZ/G1C (r8a77470) based iWave SBC (iwg23s-sbc) and
   RZ/G1N (r8a7744) based boards:
   - Correct SDHI2 VccQ regulator to fix SDR50 mode
 
 * RZ/A2M (r7s9210) based rza2mevb EVB
   RZ/A1H (r7s72100) based rskrza1 board
   - Describe input switch in DT
 
 * RZ/A2M (r7s9210) based rza2mevb EVB
   - Sort nodes to ease future maintenance
   - Add USB host, Ethernet and SDHI support
 
 * RZ/A2M (r7s9210) and RZ/A1H (r7s72100) SoCs
   - Describe IRQC device in DT
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Merge tag 'renesas-arm-dt-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt

Renesas ARM Based SoC DT Updates for v5.3

* Renesas SoC based boards
  - Use ip=on for bootargs

* Renesas R-Car Gen 2 SOC based boards
  - Configure PMIC IRQ pinmux

* R-Car V2H (r8a7792) SoC
  - Describe CMT devices in DT

* RZ/G1C (r8a77470) based iWave SBC (iwg23s-sbc) and
  RZ/G1N (r8a7744) based boards:
  - Correct SDHI2 VccQ regulator to fix SDR50 mode

* RZ/A2M (r7s9210) based rza2mevb EVB
  RZ/A1H (r7s72100) based rskrza1 board
  - Describe input switch in DT

* RZ/A2M (r7s9210) based rza2mevb EVB
  - Sort nodes to ease future maintenance
  - Add USB host, Ethernet and SDHI support

* RZ/A2M (r7s9210) and RZ/A1H (r7s72100) SoCs
  - Describe IRQC device in DT

* tag 'renesas-arm-dt-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (22 commits)
  ARM: dts: r8a7792: Add CMT0 and CMT1 to r8a7792
  ARM: dts: iwg23s-sbc: Fix SDHI2 VccQ regulator
  ARM: dts: iwg20d-q7-common: Fix SDHI1 VccQ regularor
  ARM: dts: rza2mevb: Add input switch
  ARM: dts: r7s9210: Add IRQC device node
  ARM: dts: rza2mevb: sort nodes of rza2mevb board
  ARM: dts: renesas: Use ip=on for bootargs
  ARM: dts: rza2mevb: Add USB Host support
  ARM: dts: r7s9210: Add USB Device support
  ARM: dts: r7s9210: Add USB Host support
  ARM: dts: rskrza1: Add input switches
  ARM: dts: r7s72100: Add IRQC device node
  ARM: dts: r8a779x: Configure PMIC IRQ pinmux
  ARM: dts: rza2mevb: Add 48MHz USB clock
  ARM: dts: r7s9210: Add USB clock
  ARM: dts: rza2mevb: add ethernet aliases
  ARM: dts: rza2mevb: Add SDHI support
  ARM: dts: rza2mevb: Add Ethernet support
  ARM: dts: r7s9210: Add SDHI support
  ARM: dts: r7s9210: Add RIIC support
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-06-25 04:44:18 -07:00
commit cd75dd0058
26 changed files with 593 additions and 39 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/emev2-kzm9d.dts
View File

@ -25,7 +25,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial1:115200n8";
};

2
arch/arm/boot/dts/iwg20d-q7-common.dtsi
View File

@ -87,7 +87,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1
1800000 0>;

2
arch/arm/boot/dts/r7s72100-genmai.dts
View File

@ -20,7 +20,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};

38
arch/arm/boot/dts/r7s72100-rskrza1.dts
View File

@ -8,6 +8,7 @@
/dts-v1/;
#include "r7s72100.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
/ {
@ -28,6 +29,37 @@
reg = <0x08000000 0x02000000>;
};
keyboard {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&keyboard_pins>;
key-1 {
interrupt-parent = <&irqc>;
interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
linux,code = <KEY_1>;
label = "SW1";
wakeup-source;
};
key-2 {
interrupt-parent = <&irqc>;
interrupts = <2 IRQ_TYPE_EDGE_BOTH>;
linux,code = <KEY_2>;
label = "SW2";
wakeup-source;
};
key-3 {
interrupt-parent = <&irqc>;
interrupts = <5 IRQ_TYPE_EDGE_BOTH>;
linux,code = <KEY_3>;
label = "SW3";
wakeup-source;
};
};
lbsc {
#address-cells = <1>;
#size-cells = <1>;
@ -101,6 +133,12 @@
<RZA1_PINMUX(1, 7, 1)>; /* RIIC3SDA */
};
keyboard_pins: keyboard {
pinmux = <RZA1_PINMUX(1, 9, 3)>, /* IRQ3 */
<RZA1_PINMUX(1, 8, 3)>, /* IRQ2 */
<RZA1_PINMUX(1, 11, 3)>; /* IRQ5 */
};
/* Serial Console */
scif2_pins: serial2 {
pinmux = <RZA1_PINMUX(3, 0, 6)>, /* TxD2 */

19
arch/arm/boot/dts/r7s72100.dtsi
View File

@ -670,6 +670,25 @@
status = "disabled";
};
irqc: interrupt-controller@fcfef800 {
compatible = "renesas,r7s72100-irqc",
"renesas,rza1-irqc";
#interrupt-cells = <2>;
#address-cells = <0>;
interrupt-controller;
reg = <0xfcfef800 0x6>;
interrupt-map =
<0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <7 0>;
};
mtu2: timer@fcff0000 {
compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
reg = <0xfcff0000 0x400>;

169
arch/arm/boot/dts/r7s9210-rza2mevb.dts
View File

@ -9,6 +9,7 @@
/dts-v1/;
#include "r7s9210.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/r7s9210-pinctrl.h>
/ {
@ -17,6 +18,8 @@
aliases {
serial0 = &scif4;
ethernet0 = &ether0;
ethernet1 = &ether1;
};
chosen {
@ -24,9 +27,19 @@
stdout-path = "serial0:115200n8";
};
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x00800000>; /* HyperRAM */
keyboard {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&keyboard_pins>;
key-3 {
interrupt-parent = <&irqc>;
interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
linux,code = <KEY_3>;
label = "SW3";
wakeup-source;
};
};
lbsc {
@ -44,6 +57,41 @@
gpios = <&pinctrl RZA2_PIN(PORTC, 1) GPIO_ACTIVE_HIGH>;
};
};
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x00800000>; /* HyperRAM */
};
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&ether0 {
pinctrl-names = "default";
pinctrl-0 = <&eth0_pins>;
status = "okay";
renesas,no-ether-link;
phy-handle = <&phy0>;
phy0: ethernet-phy@0 {
reg = <0>;
};
};
&ether1 {
pinctrl-names = "default";
pinctrl-0 = <&eth1_pins>;
status = "okay";
renesas,no-ether-link;
phy-handle = <&phy1>;
phy1: ethernet-phy@1 {
reg = <0>;
};
};
/* EXTAL */
@ -51,19 +99,6 @@
clock-frequency = <24000000>; /* 24MHz */
};
/* RTC_X1 */
&rtc_x1_clk {
clock-frequency = <32768>;
};
&pinctrl {
/* Serial Console */
scif4_pins: serial4 {
pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */
<RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */
};
};
/* High resolution System tick timers */
&ostm0 {
status = "okay";
@ -73,6 +108,73 @@
status = "okay";
};
&pinctrl {
eth0_pins: eth0 {
pinmux = <RZA2_PINMUX(PORTE, 0, 7)>, /* REF50CK0 */
<RZA2_PINMUX(PORT6, 1, 7)>, /* RMMI0_TXDEN */
<RZA2_PINMUX(PORT6, 2, 7)>, /* RMII0_TXD0 */
<RZA2_PINMUX(PORT6, 3, 7)>, /* RMII0_TXD1 */
<RZA2_PINMUX(PORTE, 4, 7)>, /* RMII0_CRSDV */
<RZA2_PINMUX(PORTE, 1, 7)>, /* RMII0_RXD0 */
<RZA2_PINMUX(PORTE, 2, 7)>, /* RMII0_RXD1 */
<RZA2_PINMUX(PORTE, 3, 7)>, /* RMII0_RXER */
<RZA2_PINMUX(PORTE, 5, 1)>, /* ET0_MDC */
<RZA2_PINMUX(PORTE, 6, 1)>, /* ET0_MDIO */
<RZA2_PINMUX(PORTL, 0, 5)>; /* IRQ4 */
};
eth1_pins: eth1 {
pinmux = <RZA2_PINMUX(PORTK, 3, 7)>, /* REF50CK1 */
<RZA2_PINMUX(PORTK, 0, 7)>, /* RMMI1_TXDEN */
<RZA2_PINMUX(PORTK, 1, 7)>, /* RMII1_TXD0 */
<RZA2_PINMUX(PORTK, 2, 7)>, /* RMII1_TXD1 */
<RZA2_PINMUX(PORT3, 2, 7)>, /* RMII1_CRSDV */
<RZA2_PINMUX(PORTK, 4, 7)>, /* RMII1_RXD0 */
<RZA2_PINMUX(PORT3, 5, 7)>, /* RMII1_RXD1 */
<RZA2_PINMUX(PORT3, 1, 7)>, /* RMII1_RXER */
<RZA2_PINMUX(PORT3, 3, 1)>, /* ET1_MDC */
<RZA2_PINMUX(PORT3, 4, 1)>, /* ET1_MDIO */
<RZA2_PINMUX(PORTL, 1, 5)>; /* IRQ5 */
};
keyboard_pins: keyboard {
pinmux = <RZA2_PINMUX(PORTJ, 1, 6)>; /* IRQ0 */
};
/* Serial Console */
scif4_pins: serial4 {
pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */
<RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */
};
sdhi0_pins: sdhi0 {
pinmux = <RZA2_PINMUX(PORT5, 0, 3)>, /* SD0_CD */
<RZA2_PINMUX(PORT5, 1, 3)>; /* SD0_WP */
};
sdhi1_pins: sdhi1 {
pinmux = <RZA2_PINMUX(PORT5, 4, 3)>, /* SD1_CD */
<RZA2_PINMUX(PORT5, 5, 3)>; /* SD1_WP */
};
usb0_pins: usb0 {
pinmux = <RZA2_PINMUX(PORT5, 2, 3)>, /* VBUSIN0 */
<RZA2_PINMUX(PORTC, 6, 1)>, /* VBUSEN0 */
<RZA2_PINMUX(PORTC, 7, 1)>; /* OVRCUR0 */
};
usb1_pins: usb1 {
pinmux = <RZA2_PINMUX(PORTC, 0, 1)>, /* VBUSIN1 */
<RZA2_PINMUX(PORTC, 5, 1)>, /* VBUSEN1 */
<RZA2_PINMUX(PORT7, 5, 5)>; /* OVRCUR1 */
};
};
/* RTC_X1 */
&rtc_x1_clk {
clock-frequency = <32768>;
};
/* Serial Console */
&scif4 {
pinctrl-names = "default";
@ -80,3 +182,38 @@
status = "okay";
};
&sdhi0 {
pinctrl-names = "default";
pinctrl-0 = <&sdhi0_pins>;
bus-width = <4>;
status = "okay";
};
&sdhi1 {
pinctrl-names = "default";
pinctrl-0 = <&sdhi1_pins>;
bus-width = <4>;
status = "okay";
};
/* USB-0 as Host */
&usb2_phy0 {
pinctrl-names = "default";
pinctrl-0 = <&usb0_pins>;
dr_mode = "host"; /* Requires JP3 to be fitted */
status = "okay";
};
/* USB-1 as Host */
&usb2_phy1 {
pinctrl-names = "default";
pinctrl-0 = <&usb1_pins>;
dr_mode = "host";
status = "okay";
};
/* USB_X1 */
&usb_x1_clk {
clock-frequency = <48000000>;
};

286
arch/arm/boot/dts/r7s9210.dtsi
View File

@ -30,6 +30,13 @@
clock-frequency = <0>;
};
usb_x1_clk: usb_x1 {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value (48000000) must be set by board */
clock-frequency = <0>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
@ -146,6 +153,152 @@
status = "disabled";
};
spi0: spi@e800c800 {
compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz";
reg = <0xe800c800 0x24>;
interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error", "rx", "tx";
clocks = <&cpg CPG_MOD 97>;
power-domains = <&cpg>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spi1: spi@e800d000 {
compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz";
reg = <0xe800d000 0x24>;
interrupts = <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error", "rx", "tx";
clocks = <&cpg CPG_MOD 96>;
power-domains = <&cpg>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spi2: spi@e800d800 {
compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz";
reg = <0xe800d800 0x24>;
interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error", "rx", "tx";
clocks = <&cpg CPG_MOD 95>;
power-domains = <&cpg>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
ether0: ethernet@e8204000 {
compatible = "renesas,ether-r7s9210";
reg = <0xe8204000 0x200>;
interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 65>;
power-domains = <&cpg>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
ether1: ethernet@e8204200 {
compatible = "renesas,ether-r7s9210";
reg = <0xe8204200 0x200>;
interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 64>;
power-domains = <&cpg>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c0: i2c@e803a000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s9210", "renesas,riic-rz";
reg = <0xe803a000 0x44>;
interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 233 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 234 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 87>;
power-domains = <&cpg>;
clock-frequency = <100000>;
status = "disabled";
};
i2c1: i2c@e803a400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s9210", "renesas,riic-rz";
reg = <0xe803a400 0x44>;
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 241 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 242 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 86>;
power-domains = <&cpg>;
clock-frequency = <100000>;
status = "disabled";
};
i2c2: i2c@e803a800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s9210", "renesas,riic-rz";
reg = <0xe803a800 0x44>;
interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 249 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 85>;
power-domains = <&cpg>;
clock-frequency = <100000>;
status = "disabled";
};
i2c3: i2c@e803ac00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s9210", "renesas,riic-rz";
reg = <0xe803ac00 0x44>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 257 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 258 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 84>;
power-domains = <&cpg>;
clock-frequency = <100000>;
status = "disabled";
};
ostm0: timer@e803b000 {
compatible = "renesas,r7s9210-ostm", "renesas,ostm";
reg = <0xe803b000 0x30>;
@ -176,6 +329,120 @@
status = "disabled";
};
ohci0: usb@e8218000 {
compatible = "generic-ohci";
reg = <0xe8218000 0x100>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 61>;
phys = <&usb2_phy0>;
phy-names = "usb";
power-domains = <&cpg>;
status = "disabled";
};
ehci0: usb@e8218100 {
compatible = "generic-ehci";
reg = <0xe8218100 0x100>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 61>;
phys = <&usb2_phy0>;
phy-names = "usb";
power-domains = <&cpg>;
status = "disabled";
};
usb2_phy0: usb-phy@e8218200 {
compatible = "renesas,usb2-phy-r7s9210", "renesas,rcar-gen3-usb2-phy";
reg = <0xe8218200 0x700>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 61>, <&usb_x1_clk>;
clock-names = "fck", "usb_x1";
power-domains = <&cpg>;
#phy-cells = <0>;
status = "disabled";
};
usbhs0: usb@e8219000 {
compatible = "renesas,usbhs-r7s9210", "renesas,rza2-usbhs";
reg = <0xe8219000 0x724>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 61>;
renesas,buswait = <7>;
phys = <&usb2_phy0>;
phy-names = "usb";
power-domains = <&cpg>;
status = "disabled";
};
ohci1: usb@e821a000 {
compatible = "generic-ohci";
reg = <0xe821a000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 60>;
phys = <&usb2_phy1>;
phy-names = "usb";
power-domains = <&cpg>;
status = "disabled";
};
ehci1: usb@e821a100 {
compatible = "generic-ehci";
reg = <0xe821a100 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 60>;
phys = <&usb2_phy1>;
phy-names = "usb";
power-domains = <&cpg>;
status = "disabled";
};
usb2_phy1: usb-phy@e821a200 {
compatible = "renesas,usb2-phy-r7s9210", "renesas,rcar-gen3-usb2-phy";
reg = <0xe821a200 0x700>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 60>, <&usb_x1_clk>;
clock-names = "fck", "usb_x1";
power-domains = <&cpg>;
#phy-cells = <0>;
status = "disabled";
};
usbhs1: usb@e821b000 {
compatible = "renesas,usbhs-r7s9210", "renesas,rza2-usbhs";
reg = <0xe821b000 0x724>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 60>;
renesas,buswait = <7>;
phys = <&usb2_phy1>;
phy-names = "usb";
power-domains = <&cpg>;
status = "disabled";
};
sdhi0: sd@e8228000 {
compatible = "renesas,sdhi-r7s9210";
reg = <0xe8228000 0x8c0>;
interrupts = <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 103>, <&cpg CPG_MOD 102>;
clock-names = "core", "cd";
power-domains = <&cpg>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
sdhi1: sd@e822a000 {
compatible = "renesas,sdhi-r7s9210";
reg = <0xe822a000 0x8c0>;
interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 101>, <&cpg CPG_MOD 100>;
clock-names = "core", "cd";
power-domains = <&cpg>;
cap-sd-highspeed;
cap-sdio-irq;
status = "disabled";
};
gic: interrupt-controller@e8221000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
@ -206,6 +473,25 @@
reg = <0xfcfe8004 4>;
};
irqc: interrupt-controller@fcfef800 {
compatible = "renesas,r7s9210-irqc",
"renesas,rza1-irqc";
#interrupt-cells = <2>;
#address-cells = <0>;
interrupt-controller;
reg = <0xfcfef800 0x6>;
interrupt-map =
<0 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<1 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<2 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<3 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<4 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<5 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<6 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<7 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <7 0>;
};
pinctrl: pin-controller@fcffe000 {
compatible = "renesas,r7s9210-pinctrl";
reg = <0xfcffe000 0x1000>;

2
arch/arm/boot/dts/r8a73a4-ape6evm.dts
View File

@ -19,7 +19,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};

2
arch/arm/boot/dts/r8a7740-armadillo800eva.dts
View File

@ -21,7 +21,7 @@
};
chosen {
bootargs = "earlyprintk ignore_loglevel root=/dev/nfs ip=dhcp rw";
bootargs = "earlyprintk ignore_loglevel root=/dev/nfs ip=on rw";
stdout-path = "serial0:115200n8";
};

2
arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
View File

@ -17,7 +17,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};

2
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
View File

@ -42,7 +42,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial3:115200n8";
};

2
arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
View File

@ -17,7 +17,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};

4
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
View File

@ -18,7 +18,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial1:115200n8";
};
@ -63,7 +63,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1
1800000 0>;

2
arch/arm/boot/dts/r8a7778-bockw.dts
View File

@ -25,7 +25,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};

2
arch/arm/boot/dts/r8a7779-marzen.dts
View File

@ -21,7 +21,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};

9
arch/arm/boot/dts/r8a7790-lager.dts
View File

@ -56,7 +56,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};
@ -423,6 +423,8 @@
*/
i2cpwr: i2c-13 {
compatible = "i2c-demux-pinctrl";
pinctrl-names = "default";
pinctrl-0 = <&pmic_irq_pins>;
i2c-parent = <&iic3>, <&i2c3>;
i2c-bus-name = "i2c-pwr";
#address-cells = <1>;
@ -615,6 +617,11 @@
function = "iic3";
};
pmic_irq_pins: pmicirq {
groups = "intc_irq2";
function = "intc";
};
hsusb_pins: hsusb {
groups = "usb0_ovc_vbus";
function = "usb0";

9
arch/arm/boot/dts/r8a7790-stout.dts
View File

@ -19,7 +19,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};
@ -179,6 +179,11 @@
function = "iic3";
};
pmic_irq_pins: pmicirq {
groups = "intc_irq2";
function = "intc";
};
usb0_pins: usb0 {
groups = "usb0";
function = "usb0";
@ -317,7 +322,7 @@
&iic3 {
pinctrl-names = "default";
pinctrl-0 = <&iic3_pins>;
pinctrl-0 = <&iic3_pins &pmic_irq_pins>;
status = "okay";
pmic@58 {

9
arch/arm/boot/dts/r8a7791-koelsch.dts
View File

@ -56,7 +56,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};
@ -540,6 +540,11 @@
function = "intc";
};
pmic_irq_pins: pmicirq {
groups = "intc_irq2";
function = "intc";
};
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
@ -776,6 +781,8 @@
};
&i2c6 {
pinctrl-names = "default";
pinctrl-0 = <&pmic_irq_pins>;
status = "okay";
clock-frequency = <100000>;

9
arch/arm/boot/dts/r8a7791-porter.dts
View File

@ -31,7 +31,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};
@ -228,6 +228,11 @@
function = "intc";
};
pmic_irq_pins: pmicirq {
groups = "intc_irq2";
function = "intc";
};
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
@ -373,6 +378,8 @@
};
&i2c6 {
pinctrl-names = "default";
pinctrl-0 = <&pmic_irq_pins>;
status = "okay";
clock-frequency = <100000>;

9
arch/arm/boot/dts/r8a7792-blanche.dts
View File

@ -21,7 +21,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};
@ -234,6 +234,11 @@
groups = "du1_rgb666", "du1_sync", "du1_disp";
function = "du1";
};
pmic_irq_pins: pmicirq {
groups = "intc_irq2";
function = "intc";
};
};
&rwdt {
@ -314,6 +319,8 @@
pmic@58 {
compatible = "dlg,da9063";
reg = <0x58>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_irq_pins>;
interrupt-parent = <&irqc>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;

2
arch/arm/boot/dts/r8a7792-wheat.dts
View File

@ -20,7 +20,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};

34
arch/arm/boot/dts/r8a7792.dtsi
View File

@ -875,6 +875,40 @@
compatible = "renesas,prr";
reg = <0 0xff000044 0 4>;
};
cmt0: timer@ffca0000 {
compatible = "renesas,r8a7792-cmt0",
"renesas,rcar-gen2-cmt0";
reg = <0 0xffca0000 0 0x1004>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 124>;
status = "disabled";
};
cmt1: timer@e6130000 {
compatible = "renesas,r8a7792-cmt1",
"renesas,rcar-gen2-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 329>;
status = "disabled";
};
};
timer {

9
arch/arm/boot/dts/r8a7793-gose.dts
View File

@ -52,7 +52,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};
@ -514,6 +514,11 @@
function = "intc";
};
pmic_irq_pins: pmicirq {
groups = "intc_irq2";
function = "intc";
};
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
@ -711,6 +716,8 @@
};
&i2c6 {
pinctrl-names = "default";
pinctrl-0 = <&pmic_irq_pins>;
status = "okay";
clock-frequency = <100000>;

2
arch/arm/boot/dts/r8a7794-alt.dts
View File

@ -22,7 +22,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};

2
arch/arm/boot/dts/r8a7794-silk.dts
View File

@ -34,7 +34,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};

2
arch/arm/boot/dts/sh73a0-kzm9g.dts
View File

@ -36,7 +36,7 @@
};
chosen {
bootargs = "root=/dev/nfs ip=dhcp ignore_loglevel rw";
bootargs = "root=/dev/nfs ip=on ignore_loglevel rw";
stdout-path = "serial0:115200n8";
};