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ath9k: Use bitfields for buffer type
Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
7dcfdcd908
commit
cd3d39a687
@ -177,11 +177,6 @@ void ath_update_chainmask(struct ath_softc *sc, int is_ht);
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/* Descriptor Management */
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/*************************/
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/* Number of descriptors per buffer. The only case where we see skbuff
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chains is due to FF aggregation in the driver. */
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#define ATH_TXDESC 1
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/* if there's more fragment for this MSDU */
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#define ATH_BF_MORE_MPDU 1
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#define ATH_TXBUF_RESET(_bf) do { \
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(_bf)->bf_status = 0; \
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(_bf)->bf_lastbf = NULL; \
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@ -191,6 +186,20 @@ chains is due to FF aggregation in the driver. */
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sizeof(struct ath_buf_state)); \
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} while (0)
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enum buffer_type {
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BUF_DATA = BIT(0),
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BUF_AGGR = BIT(1),
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BUF_AMPDU = BIT(2),
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BUF_HT = BIT(3),
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BUF_RETRY = BIT(4),
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BUF_XRETRY = BIT(5),
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BUF_SHORT_PREAMBLE = BIT(6),
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BUF_BAR = BIT(7),
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BUF_PSPOLL = BIT(8),
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BUF_AGGR_BURST = BIT(9),
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BUF_CALC_AIRTIME = BIT(10),
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};
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struct ath_buf_state {
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int bfs_nframes; /* # frames in aggregate */
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u16 bfs_al; /* length of aggregate */
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@ -199,20 +208,7 @@ struct ath_buf_state {
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int bfs_tidno; /* tid of this frame */
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int bfs_retries; /* current retries */
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struct ath_rc_series bfs_rcs[4]; /* rate series */
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u8 bfs_isdata:1; /* is a data frame/aggregate */
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u8 bfs_isaggr:1; /* is an aggregate */
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u8 bfs_isampdu:1; /* is an a-mpdu, aggregate or not */
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u8 bfs_ht:1; /* is an HT frame */
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u8 bfs_isretried:1; /* is retried */
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u8 bfs_isxretried:1; /* is excessive retried */
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u8 bfs_shpreamble:1; /* is short preamble */
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u8 bfs_isbar:1; /* is a BAR */
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u8 bfs_ispspoll:1; /* is a PS-Poll */
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u8 bfs_aggrburst:1; /* is a aggr burst */
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u8 bfs_calcairtime:1; /* requests airtime be calculated
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when set for tx frame */
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int bfs_rifsburst_elem; /* RIFS burst/bar */
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int bfs_nrifsubframes; /* # of elements in burst */
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u32 bf_type; /* BUF_* (enum buffer_type) */
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/* key type use to encrypt this frame */
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enum ath9k_key_type bfs_keytype;
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};
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@ -224,26 +220,22 @@ struct ath_buf_state {
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#define bf_seqno bf_state.bfs_seqno
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#define bf_tidno bf_state.bfs_tidno
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#define bf_rcs bf_state.bfs_rcs
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#define bf_isdata bf_state.bfs_isdata
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#define bf_isaggr bf_state.bfs_isaggr
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#define bf_isampdu bf_state.bfs_isampdu
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#define bf_ht bf_state.bfs_ht
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#define bf_isretried bf_state.bfs_isretried
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#define bf_isxretried bf_state.bfs_isxretried
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#define bf_shpreamble bf_state.bfs_shpreamble
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#define bf_rifsburst_elem bf_state.bfs_rifsburst_elem
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#define bf_nrifsubframes bf_state.bfs_nrifsubframes
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#define bf_keytype bf_state.bfs_keytype
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#define bf_isbar bf_state.bfs_isbar
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#define bf_ispspoll bf_state.bfs_ispspoll
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#define bf_aggrburst bf_state.bfs_aggrburst
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#define bf_calcairtime bf_state.bfs_calcairtime
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#define bf_isdata(bf) (bf->bf_state.bf_type & BUF_DATA)
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#define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
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#define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
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#define bf_isht(bf) (bf->bf_state.bf_type & BUF_HT)
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#define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY)
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#define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
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#define bf_isshpreamble(bf) (bf->bf_state.bf_type & BUF_SHORT_PREAMBLE)
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#define bf_isbar(bf) (bf->bf_state.bf_type & BUF_BAR)
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#define bf_ispspoll(bf) (bf->bf_state.bf_type & BUF_PSPOLL)
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#define bf_isaggrburst(bf) (bf->bf_state.bf_type & BUF_AGGR_BURST)
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/*
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* Abstraction of a contiguous buffer to transmit/receive. There is only
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* a single hw descriptor encapsulated here.
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*/
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struct ath_buf {
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struct list_head list;
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struct list_head *last;
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@ -518,7 +518,7 @@ static void ath_tx_complete_buf(struct ath_softc *sc,
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if (!txok) {
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tx_status.flags |= ATH_TX_ERROR;
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if (bf->bf_isxretried)
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if (bf_isxretried(bf))
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tx_status.flags |= ATH_TX_XRETRY;
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}
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/* Unmap this frame */
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@ -629,7 +629,7 @@ static int ath_tx_num_badfrms(struct ath_softc *sc,
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if (isnodegone || ds->ds_txstat.ts_flags == ATH9K_TX_SW_ABORTED)
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return 0;
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isaggr = bf->bf_isaggr;
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isaggr = bf_isaggr(bf);
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if (isaggr) {
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seq_st = ATH_DS_BA_SEQ(ds);
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memcpy(ba, ATH_DS_BA_BITMAP(ds), WME_BA_BMP_SIZE >> 3);
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@ -651,7 +651,7 @@ static void ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
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struct sk_buff *skb;
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struct ieee80211_hdr *hdr;
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bf->bf_isretried = 1;
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bf->bf_state.bf_type |= BUF_RETRY;
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bf->bf_retries++;
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skb = bf->bf_mpdu;
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@ -698,7 +698,7 @@ static u32 ath_pkt_duration(struct ath_softc *sc,
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u8 rc;
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int streams, pktlen;
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pktlen = bf->bf_isaggr ? bf->bf_al : bf->bf_frmlen;
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pktlen = bf_isaggr(bf) ? bf->bf_al : bf->bf_frmlen;
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rc = rt->info[rix].rateCode;
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/*
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@ -781,7 +781,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
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* let rate series flags determine which rates will actually
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* use RTS.
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*/
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if ((ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) && bf->bf_isdata) {
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if ((ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) && bf_isdata(bf)) {
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BUG_ON(!an);
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/*
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* 802.11g protection not needed, use our default behavior
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@ -793,7 +793,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
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* and the second aggregate should have any protection at all.
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*/
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if (an->an_smmode == ATH_SM_PWRSAV_DYNAMIC) {
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if (!bf->bf_aggrburst) {
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if (!bf_isaggrburst(bf)) {
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flags = ATH9K_TXDESC_RTSENA;
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dynamic_mimops = 1;
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} else {
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@ -806,7 +806,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
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* Set protection if aggregate protection on
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*/
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if (sc->sc_config.ath_aggr_prot &&
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(!bf->bf_isaggr || (bf->bf_isaggr && bf->bf_al < 8192))) {
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(!bf_isaggr(bf) || (bf_isaggr(bf) && bf->bf_al < 8192))) {
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flags = ATH9K_TXDESC_RTSENA;
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cix = rt->info[sc->sc_protrix].controlRate;
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rtsctsena = 1;
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@ -815,7 +815,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
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/*
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* For AR5416 - RTS cannot be followed by a frame larger than 8K.
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*/
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if (bf->bf_isaggr && (bf->bf_al > aggr_limit_with_rts)) {
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if (bf_isaggr(bf) && (bf->bf_al > aggr_limit_with_rts)) {
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/*
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* Ensure that in the case of SM Dynamic power save
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* while we are bursting the second aggregate the
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@ -832,7 +832,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
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/* NB: cix is set above where RTS/CTS is enabled */
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BUG_ON(cix == 0xff);
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ctsrate = rt->info[cix].rateCode |
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(bf->bf_shpreamble ? rt->info[cix].shortPreamble : 0);
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(bf_isshpreamble(bf) ? rt->info[cix].shortPreamble : 0);
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/*
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* Setup HAL rate series
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@ -846,7 +846,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
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rix = bf->bf_rcs[i].rix;
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series[i].Rate = rt->info[rix].rateCode |
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(bf->bf_shpreamble ? rt->info[rix].shortPreamble : 0);
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(bf_isshpreamble(bf) ? rt->info[rix].shortPreamble : 0);
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series[i].Tries = bf->bf_rcs[i].tries;
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@ -862,7 +862,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
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sc, rix, bf,
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(bf->bf_rcs[i].flags & ATH_RC_CW40_FLAG) != 0,
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(bf->bf_rcs[i].flags & ATH_RC_SGI_FLAG),
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bf->bf_shpreamble);
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bf_isshpreamble(bf));
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if ((an->an_smmode == ATH_SM_PWRSAV_STATIC) &&
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(bf->bf_rcs[i].flags & ATH_RC_DS_FLAG) == 0) {
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@ -875,7 +875,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
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*/
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series[i].ChSel = sc->sc_tx_chainmask;
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} else {
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if (bf->bf_ht)
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if (bf_isht(bf))
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series[i].ChSel =
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ath_chainmask_sel_logic(sc, an);
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else
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@ -908,7 +908,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
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* use the precalculated ACK durations.
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*/
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if (flags & ATH9K_TXDESC_RTSENA) { /* SIFS + CTS */
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ctsduration += bf->bf_shpreamble ?
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ctsduration += bf_isshpreamble(bf) ?
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rt->info[cix].spAckDuration :
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rt->info[cix].lpAckDuration;
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}
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@ -916,7 +916,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
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ctsduration += series[0].PktDuration;
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if ((bf->bf_flags & ATH9K_TXDESC_NOACK) == 0) { /* SIFS + ACK */
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ctsduration += bf->bf_shpreamble ?
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ctsduration += bf_isshpreamble(bf) ?
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rt->info[rix].spAckDuration :
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rt->info[rix].lpAckDuration;
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}
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@ -932,7 +932,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
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* set dur_update_en for l-sig computation except for PS-Poll frames
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*/
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ath9k_hw_set11n_ratescenario(ah, ds, lastds,
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!bf->bf_ispspoll,
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!bf_ispspoll(bf),
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ctsrate,
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ctsduration,
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series, 4, flags);
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@ -958,7 +958,7 @@ static int ath_tx_send_normal(struct ath_softc *sc,
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BUG_ON(list_empty(bf_head));
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bf = list_first_entry(bf_head, struct ath_buf, list);
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bf->bf_isampdu = 0; /* regular HT frame */
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bf->bf_state.bf_type &= ~BUF_AMPDU; /* regular HT frame */
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skb = (struct sk_buff *)bf->bf_mpdu;
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tx_info = IEEE80211_SKB_CB(skb);
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@ -998,7 +998,7 @@ static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
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while (!list_empty(&tid->buf_q)) {
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bf = list_first_entry(&tid->buf_q, struct ath_buf, list);
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ASSERT(!bf->bf_isretried);
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ASSERT(!bf_isretried(bf));
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list_cut_position(&bf_head, &tid->buf_q, &bf->bf_lastfrm->list);
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ath_tx_send_normal(sc, txq, tid, &bf_head);
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}
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@ -1025,7 +1025,7 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc,
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int isaggr, txfail, txpending, sendbar = 0, needreset = 0;
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int isnodegone = (an->an_flags & ATH_NODE_CLEAN);
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isaggr = bf->bf_isaggr;
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isaggr = bf_isaggr(bf);
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if (isaggr) {
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if (txok) {
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if (ATH_DS_TX_BA(ds)) {
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@ -1075,7 +1075,7 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc,
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ath_tx_set_retry(sc, bf);
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txpending = 1;
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} else {
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bf->bf_isxretried = 1;
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bf->bf_state.bf_type |= BUF_XRETRY;
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txfail = 1;
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sendbar = 1;
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}
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@ -1331,7 +1331,7 @@ static int ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
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txq->axq_depth--;
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if (bf->bf_isaggr)
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if (bf_isaggr(bf))
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txq->axq_aggr_depth--;
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txok = (ds->ds_txstat.ts_status == 0);
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@ -1345,14 +1345,14 @@ static int ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
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spin_unlock_bh(&sc->sc_txbuflock);
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}
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if (!bf->bf_isampdu) {
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if (!bf_isampdu(bf)) {
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/*
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* This frame is sent out as a single frame.
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* Use hardware retry status for this frame.
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*/
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bf->bf_retries = ds->ds_txstat.ts_longretry;
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if (ds->ds_txstat.ts_status & ATH9K_TXERR_XRETRY)
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bf->bf_isxretried = 1;
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bf->bf_state.bf_type |= BUF_XRETRY;
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nbad = 0;
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} else {
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nbad = ath_tx_num_badfrms(sc, bf, txok);
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@ -1368,7 +1368,7 @@ static int ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
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if (ds->ds_txstat.ts_status == 0)
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nacked++;
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if (bf->bf_isdata) {
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if (bf_isdata(bf)) {
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if (isrifs)
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tmp_ds = bf->bf_rifslast->bf_desc;
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else
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@ -1384,7 +1384,7 @@ static int ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
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/*
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* Complete this transmit unit
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*/
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if (bf->bf_isampdu)
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if (bf_isampdu(bf))
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ath_tx_complete_aggr_rifs(sc, txq, bf, &bf_head, txok);
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else
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ath_tx_complete_buf(sc, bf, &bf_head, txok, 0);
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@ -1481,7 +1481,7 @@ static void ath_tx_addto_baw(struct ath_softc *sc,
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{
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int index, cindex;
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if (bf->bf_isretried)
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if (bf_isretried(bf))
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return;
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index = ATH_BA_INDEX(tid->seq_start, bf->bf_seqno);
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@ -1516,7 +1516,7 @@ static int ath_tx_send_ampdu(struct ath_softc *sc,
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BUG_ON(list_empty(bf_head));
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bf = list_first_entry(bf_head, struct ath_buf, list);
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bf->bf_isampdu = 1;
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bf->bf_state.bf_type |= BUF_AMPDU;
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bf->bf_seqno = txctl->seqno; /* save seqno and tidno in buffer */
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bf->bf_tidno = txctl->tidno;
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@ -1860,7 +1860,7 @@ static void ath_tx_sched_aggr(struct ath_softc *sc,
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if (bf->bf_nframes == 1) {
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ASSERT(bf->bf_lastfrm == bf_last);
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bf->bf_isaggr = 0;
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bf->bf_state.bf_type &= ~BUF_AGGR;
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/*
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* clear aggr bits for every descriptor
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* XXX TODO: is there a way to optimize it?
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@ -1877,7 +1877,7 @@ static void ath_tx_sched_aggr(struct ath_softc *sc,
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/*
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* setup first desc with rate and aggr info
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*/
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bf->bf_isaggr = 1;
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bf->bf_state.bf_type |= BUF_AGGR;
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ath_buf_set_rate(sc, bf);
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ath9k_hw_set11n_aggr_first(sc->sc_ah, bf->bf_desc, bf->bf_al);
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@ -1925,7 +1925,7 @@ static void ath_tid_drain(struct ath_softc *sc,
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list_cut_position(&bf_head, &tid->buf_q, &bf->bf_lastfrm->list);
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/* update baw for software retried frame */
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if (bf->bf_isretried)
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if (bf_isretried(bf))
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ath_tx_update_baw(sc, tid, bf->bf_seqno);
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/*
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@ -2014,11 +2014,21 @@ static int ath_tx_start_dma(struct ath_softc *sc,
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/* set up this buffer */
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ATH_TXBUF_RESET(bf);
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bf->bf_frmlen = txctl->frmlen;
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bf->bf_isdata = ieee80211_is_data(fc);
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bf->bf_isbar = ieee80211_is_back_req(fc);
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bf->bf_ispspoll = ieee80211_is_pspoll(fc);
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ieee80211_is_data(fc) ?
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(bf->bf_state.bf_type |= BUF_DATA) :
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(bf->bf_state.bf_type &= ~BUF_DATA);
|
||||
ieee80211_is_back_req(fc) ?
|
||||
(bf->bf_state.bf_type |= BUF_BAR) :
|
||||
(bf->bf_state.bf_type &= ~BUF_BAR);
|
||||
ieee80211_is_pspoll(fc) ?
|
||||
(bf->bf_state.bf_type |= BUF_PSPOLL) :
|
||||
(bf->bf_state.bf_type &= ~BUF_PSPOLL);
|
||||
(sc->sc_flags & ATH_PREAMBLE_SHORT) ?
|
||||
(bf->bf_state.bf_type |= BUF_SHORT_PREAMBLE) :
|
||||
(bf->bf_state.bf_type &= ~BUF_SHORT_PREAMBLE);
|
||||
|
||||
bf->bf_flags = txctl->flags;
|
||||
bf->bf_shpreamble = sc->sc_flags & ATH_PREAMBLE_SHORT;
|
||||
bf->bf_keytype = txctl->keytype;
|
||||
tx_info_priv = (struct ath_tx_info_priv *)tx_info->driver_data[0];
|
||||
rcs = tx_info_priv->rcs;
|
||||
@ -2060,7 +2070,9 @@ static int ath_tx_start_dma(struct ath_softc *sc,
|
||||
ds); /* first descriptor */
|
||||
|
||||
bf->bf_lastfrm = bf;
|
||||
bf->bf_ht = txctl->ht;
|
||||
(txctl->ht) ?
|
||||
(bf->bf_state.bf_type |= BUF_HT) :
|
||||
(bf->bf_state.bf_type &= ~BUF_HT);
|
||||
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
|
||||
@ -2162,7 +2174,7 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
|
||||
|
||||
/* Setup tx descriptors */
|
||||
error = ath_descdma_setup(sc, &sc->sc_txdma, &sc->sc_txbuf,
|
||||
"tx", nbufs * ATH_FRAG_PER_MSDU, ATH_TXDESC);
|
||||
"tx", nbufs * ATH_FRAG_PER_MSDU, 1);
|
||||
if (error != 0) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: failed to allocate tx descriptors: %d\n",
|
||||
@ -2486,7 +2498,7 @@ void ath_tx_draintxq(struct ath_softc *sc,
|
||||
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
|
||||
if (bf->bf_isampdu)
|
||||
if (bf_isampdu(bf))
|
||||
ath_tx_complete_aggr_rifs(sc, txq, bf, &bf_head, 0);
|
||||
else
|
||||
ath_tx_complete_buf(sc, bf, &bf_head, 0, 0);
|
||||
@ -2647,7 +2659,7 @@ void ath_tx_aggr_teardown(struct ath_softc *sc,
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
while (!list_empty(&txtid->buf_q)) {
|
||||
bf = list_first_entry(&txtid->buf_q, struct ath_buf, list);
|
||||
if (!bf->bf_isretried) {
|
||||
if (!bf_isretried(bf)) {
|
||||
/*
|
||||
* NB: it's based on the assumption that
|
||||
* software retried frame will always stay
|
||||
|
Loading…
Reference in New Issue
Block a user