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tg3: Match power source to driver state
Now that the driver state (and power source) is being more intensely scrutinized, we need to make sure it is correct 100% of the time. This patch finds and fixes all dangling power state transitions. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -2357,7 +2357,7 @@ static void tg3_pwrsrc_switch_to_vaux(struct tg3 *tp)
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}
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}
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static void tg3_frob_aux_power_5717(struct tg3 *tp)
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static void tg3_frob_aux_power_5717(struct tg3 *tp, bool wol_enable)
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{
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u32 msg = 0;
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@ -2365,8 +2365,7 @@ static void tg3_frob_aux_power_5717(struct tg3 *tp)
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if (tg3_ape_lock(tp, TG3_APE_LOCK_GPIO))
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return;
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if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE) ||
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tg3_flag(tp, WOL_ENABLE))
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if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE) || wol_enable)
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msg = TG3_GPIO_MSG_NEED_VAUX;
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msg = tg3_set_function_status(tp, msg);
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@ -2383,7 +2382,7 @@ done:
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tg3_ape_unlock(tp, TG3_APE_LOCK_GPIO);
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}
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static void tg3_frob_aux_power(struct tg3 *tp)
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static void tg3_frob_aux_power(struct tg3 *tp, bool include_wol)
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{
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bool need_vaux = false;
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@ -2395,7 +2394,8 @@ static void tg3_frob_aux_power(struct tg3 *tp)
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720) {
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tg3_frob_aux_power_5717(tp);
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tg3_frob_aux_power_5717(tp, include_wol ?
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tg3_flag(tp, WOL_ENABLE) != 0 : 0);
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return;
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}
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@ -2411,13 +2411,14 @@ static void tg3_frob_aux_power(struct tg3 *tp)
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if (tg3_flag(tp_peer, INIT_COMPLETE))
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return;
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if (tg3_flag(tp_peer, WOL_ENABLE) ||
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if ((include_wol && tg3_flag(tp_peer, WOL_ENABLE)) ||
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tg3_flag(tp_peer, ENABLE_ASF))
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need_vaux = true;
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}
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}
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if (tg3_flag(tp, WOL_ENABLE) || tg3_flag(tp, ENABLE_ASF))
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if ((include_wol && tg3_flag(tp, WOL_ENABLE)) ||
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tg3_flag(tp, ENABLE_ASF))
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need_vaux = true;
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if (need_vaux)
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@ -3000,7 +3001,7 @@ static int tg3_power_down_prepare(struct tg3 *tp)
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if (!(device_should_wake) && !tg3_flag(tp, ENABLE_ASF))
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tg3_power_down_phy(tp, do_low_power);
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tg3_frob_aux_power(tp);
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tg3_frob_aux_power(tp, true);
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/* Workaround for unstable PLL clock */
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if ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) ||
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@ -9556,6 +9557,8 @@ err_out2:
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err_out1:
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tg3_ints_fini(tp);
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tg3_frob_aux_power(tp, false);
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pci_set_power_state(tp->pdev, PCI_D3hot);
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return err;
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}
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@ -15400,6 +15403,11 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
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pci_set_drvdata(pdev, dev);
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if (tg3_flag(tp, 5717_PLUS)) {
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/* Resume a low-power mode */
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tg3_frob_aux_power(tp, false);
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}
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err = register_netdev(dev);
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if (err) {
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dev_err(&pdev->dev, "Cannot register net device, aborting\n");
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