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drm/msm/a6xx: Add A610 speedbin support
A610 is implemented on at least three SoCs: SM6115 (bengal), SM6125 (trinket) and SM6225 (khaje). Trinket does not support speed binning (only a single SKU exists) and we don't yet support khaje upstream. Hence, add a fuse mapping table for bengal to allow for per-chip frequency limiting. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542780/ Signed-off-by: Rob Clark <robdclark@chromium.org>
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@ -2204,6 +2204,30 @@ static bool a6xx_progress(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
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return progress;
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}
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static u32 a610_get_speed_bin(u32 fuse)
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{
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/*
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* There are (at least) three SoCs implementing A610: SM6125 (trinket),
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* SM6115 (bengal) and SM6225 (khaje). Trinket does not have speedbinning,
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* as only a single SKU exists and we don't support khaje upstream yet.
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* Hence, this matching table is only valid for bengal and can be easily
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* expanded if need be.
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*/
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if (fuse == 0)
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return 0;
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else if (fuse == 206)
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return 1;
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else if (fuse == 200)
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return 2;
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else if (fuse == 157)
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return 3;
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else if (fuse == 127)
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return 4;
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return UINT_MAX;
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}
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static u32 a618_get_speed_bin(u32 fuse)
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{
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if (fuse == 0)
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@ -2301,6 +2325,9 @@ static u32 fuse_to_supp_hw(struct device *dev, struct adreno_gpu *adreno_gpu, u3
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{
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u32 val = UINT_MAX;
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if (adreno_is_a610(adreno_gpu))
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val = a610_get_speed_bin(fuse);
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if (adreno_is_a618(adreno_gpu))
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val = a618_get_speed_bin(fuse);
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