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arm64: dts: realtek: rtd16xx: Introduce iso and misc syscon
Group UART0 into an Isolation syscon mfd node. Group UART1 and UART2 into a Miscellaneous syscon mfd node. Acked-by: James Tai <james.tai@realtek.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
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@ -137,34 +137,22 @@
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#size-cells = <1>;
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ranges = <0x0 0x98000000 0x200000>;
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uart0: serial0@7800 {
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compatible = "snps,dw-apb-uart";
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reg = <0x7800 0x400>;
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reg-shift = <2>;
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iso: syscon@7000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x7000 0x1000>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <27000000>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x7000 0x1000>;
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};
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uart1: serial1@1b200 {
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compatible = "snps,dw-apb-uart";
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reg = <0x1b200 0x400>;
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reg-shift = <2>;
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misc: syscon@1b000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x1b000 0x1000>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <432000000>;
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status = "disabled";
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};
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uart2: serial2@1b400 {
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compatible = "snps,dw-apb-uart";
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reg = <0x1b400 0x400>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <432000000>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x1b000 0x1000>;
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};
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};
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@ -178,3 +166,37 @@
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};
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};
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};
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&iso {
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uart0: serial0@800 {
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compatible = "snps,dw-apb-uart";
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reg = <0x800 0x400>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <27000000>;
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status = "disabled";
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};
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};
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&misc {
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uart1: serial1@200 {
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compatible = "snps,dw-apb-uart";
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reg = <0x200 0x400>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <432000000>;
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status = "disabled";
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};
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uart2: serial2@400 {
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compatible = "snps,dw-apb-uart";
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reg = <0x400 0x400>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <432000000>;
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status = "disabled";
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};
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};
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