mailbox: qcom-cpucp: fix 64BIT dependency

This newly added driver fails compile testing on 32-bit architectures
because it relies on 64-bit MMIO register access:

drivers/mailbox/qcom-cpucp-mbox.c: In function 'qcom_cpucp_mbox_irq_fn':
drivers/mailbox/qcom-cpucp-mbox.c:54:18: error: implicit declaration of function 'readq'; did you mean 'readb'? [-Wimplicit-function-declaration]
   54 |         status = readq(cpucp->rx_base + APSS_CPUCP_RX_MBOX_STAT);
      |                  ^~~~~
      |                  readb
drivers/mailbox/qcom-cpucp-mbox.c:65:17: error: implicit declaration of function 'writeq'; did you mean 'writeb'? [-Wimplicit-function-declaration]
   65 |                 writeq(BIT(i), cpucp->rx_base + APSS_CPUCP_RX_MBOX_CLEAR);
      |                 ^~~~~~
      |                 writeb

Change the Kconfig dependency to disallow that configuration as well.

Fixes: 0e2a9a0310 ("mailbox: Add support for QTI CPUCP mailbox controller")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
This commit is contained in:
Arnd Bergmann 2024-07-19 12:02:23 +02:00 committed by Jassi Brar
parent 0e2a9a0310
commit cbf5009580

View File

@ -278,7 +278,7 @@ config SPRD_MBOX
config QCOM_CPUCP_MBOX
tristate "Qualcomm Technologies, Inc. CPUCP mailbox driver"
depends on ARCH_QCOM || (COMPILE_TEST && 64BIT)
depends on (ARCH_QCOM || COMPILE_TEST) && 64BIT
help
Qualcomm Technologies, Inc. CPUSS Control Processor (CPUCP) mailbox
controller driver enables communication between AP and CPUCP. Say