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firmware: xilinx: Remove eemi ops for set_requirement
Use direct function call instead of using eemi ops for set_requirement. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-19-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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07fb1a4619
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@ -778,13 +778,14 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
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*
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*
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* Return: Returns status, either success or error+reason
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* Return: Returns status, either success or error+reason
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*/
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*/
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static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
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int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
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const u32 qos,
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const u32 qos,
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const enum zynqmp_pm_request_ack ack)
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const enum zynqmp_pm_request_ack ack)
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{
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{
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return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities,
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return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities,
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qos, ack, NULL);
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qos, ack, NULL);
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}
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}
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EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
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/**
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/**
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* zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using
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* zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using
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@ -811,7 +812,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out)
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}
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}
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static const struct zynqmp_eemi_ops eemi_ops = {
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static const struct zynqmp_eemi_ops eemi_ops = {
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.set_requirement = zynqmp_pm_set_requirement,
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.fpga_load = zynqmp_pm_fpga_load,
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.fpga_load = zynqmp_pm_fpga_load,
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.fpga_get_status = zynqmp_pm_fpga_get_status,
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.fpga_get_status = zynqmp_pm_fpga_get_status,
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.aes = zynqmp_pm_aes_engine,
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.aes = zynqmp_pm_aes_engine,
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@ -23,8 +23,6 @@
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/* Flag stating if PM nodes mapped to the PM domain has been requested */
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/* Flag stating if PM nodes mapped to the PM domain has been requested */
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#define ZYNQMP_PM_DOMAIN_REQUESTED BIT(0)
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#define ZYNQMP_PM_DOMAIN_REQUESTED BIT(0)
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static const struct zynqmp_eemi_ops *eemi_ops;
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static int min_capability;
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static int min_capability;
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/**
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/**
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@ -76,11 +74,8 @@ static int zynqmp_gpd_power_on(struct generic_pm_domain *domain)
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int ret;
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int ret;
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struct zynqmp_pm_domain *pd;
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struct zynqmp_pm_domain *pd;
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if (!eemi_ops->set_requirement)
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return -ENXIO;
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pd = container_of(domain, struct zynqmp_pm_domain, gpd);
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pd = container_of(domain, struct zynqmp_pm_domain, gpd);
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ret = eemi_ops->set_requirement(pd->node_id,
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ret = zynqmp_pm_set_requirement(pd->node_id,
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ZYNQMP_PM_CAPABILITY_ACCESS,
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ZYNQMP_PM_CAPABILITY_ACCESS,
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ZYNQMP_PM_MAX_QOS,
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ZYNQMP_PM_MAX_QOS,
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ZYNQMP_PM_REQUEST_ACK_BLOCKING);
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ZYNQMP_PM_REQUEST_ACK_BLOCKING);
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@ -111,9 +106,6 @@ static int zynqmp_gpd_power_off(struct generic_pm_domain *domain)
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u32 capabilities = min_capability;
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u32 capabilities = min_capability;
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bool may_wakeup;
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bool may_wakeup;
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if (!eemi_ops->set_requirement)
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return -ENXIO;
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pd = container_of(domain, struct zynqmp_pm_domain, gpd);
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pd = container_of(domain, struct zynqmp_pm_domain, gpd);
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/* If domain is already released there is nothing to be done */
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/* If domain is already released there is nothing to be done */
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@ -134,7 +126,7 @@ static int zynqmp_gpd_power_off(struct generic_pm_domain *domain)
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}
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}
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}
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}
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ret = eemi_ops->set_requirement(pd->node_id, capabilities, 0,
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ret = zynqmp_pm_set_requirement(pd->node_id, capabilities, 0,
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ZYNQMP_PM_REQUEST_ACK_NO);
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ZYNQMP_PM_REQUEST_ACK_NO);
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/**
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/**
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* If powering down of any node inside this domain fails,
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* If powering down of any node inside this domain fails,
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@ -260,10 +252,6 @@ static int zynqmp_gpd_probe(struct platform_device *pdev)
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struct zynqmp_pm_domain *pd;
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struct zynqmp_pm_domain *pd;
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struct device *dev = &pdev->dev;
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struct device *dev = &pdev->dev;
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eemi_ops = zynqmp_pm_get_eemi_ops();
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if (IS_ERR(eemi_ops))
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return PTR_ERR(eemi_ops);
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pd = devm_kcalloc(dev, ZYNQMP_NUM_DOMAINS, sizeof(*pd), GFP_KERNEL);
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pd = devm_kcalloc(dev, ZYNQMP_NUM_DOMAINS, sizeof(*pd), GFP_KERNEL);
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if (!pd)
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if (!pd)
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return -ENOMEM;
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return -ENOMEM;
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@ -296,10 +296,6 @@ struct zynqmp_pm_query_data {
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struct zynqmp_eemi_ops {
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struct zynqmp_eemi_ops {
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int (*fpga_load)(const u64 address, const u32 size, const u32 flags);
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int (*fpga_load)(const u64 address, const u32 size, const u32 flags);
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int (*fpga_get_status)(u32 *value);
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int (*fpga_get_status)(u32 *value);
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int (*set_requirement)(const u32 node,
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const u32 capabilities,
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const u32 qos,
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const enum zynqmp_pm_request_ack ack);
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int (*aes)(const u64 address, u32 *out);
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int (*aes)(const u64 address, u32 *out);
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};
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};
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@ -334,6 +330,9 @@ int zynqmp_pm_set_suspend_mode(u32 mode);
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int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
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int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
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const u32 qos, const enum zynqmp_pm_request_ack ack);
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const u32 qos, const enum zynqmp_pm_request_ack ack);
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int zynqmp_pm_release_node(const u32 node);
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int zynqmp_pm_release_node(const u32 node);
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int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
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const u32 qos,
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const enum zynqmp_pm_request_ack ack);
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#else
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#else
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static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void)
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static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void)
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{
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{
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@ -440,6 +439,13 @@ static inline int zynqmp_pm_release_node(const u32 node)
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{
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{
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return -ENODEV;
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return -ENODEV;
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}
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}
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static inline int zynqmp_pm_set_requirement(const u32 node,
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const u32 capabilities,
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const u32 qos,
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const enum zynqmp_pm_request_ack ack)
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{
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return -ENODEV;
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}
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#endif
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#endif
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#endif /* __FIRMWARE_ZYNQMP_H__ */
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#endif /* __FIRMWARE_ZYNQMP_H__ */
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