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MIPS: remove aliasing alignment if HW has antialising support

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MIPS hardware may have an antialising support and it works even
page size is small.

Setup a shared memory aliasing mask to page size if hardware has
an antialising support. Big shared memory mask forces a disruption
in page address assignment and that corrupts Android library memory
handling.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: cernekee@gmail.com
Cc: paul.gortmaker@windriver.com
Cc: kumba@gentoo.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11516/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Leonid Yegoshin 2015-11-19 17:38:21 -08:00 committed by Ralf Baechle
parent 201233e6b5
commit cb80b2a38b
1 changed files with 1 additions and 1 deletions
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2
arch/mips/mm/c-r4k.c
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@ -1721,7 +1721,7 @@ void r4k_cache_init(void)
* This code supports virtually indexed processors and will be
* unnecessarily inefficient on physically indexed processors.
*/
if (c->dcache.linesz)
if (c->dcache.linesz && cpu_has_dc_aliases)
shm_align_mask = max_t( unsigned long,
c->dcache.sets * c->dcache.linesz - 1,
PAGE_SIZE - 1);