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synced 2025-01-19 20:34:20 +08:00
RDMA/mlx5: Assign dev to DM MR
Currently, DM MR registration flow doesn't set the mlx5_ib_dev pointer and
can cause a NULL pointer dereference if userspace dumps the MR via rdma
tool.
Assign the IB device together with the other fields and remove the
redundant reference of mlx5_ib_dev from mlx5_ib_mr.
Cc: stable@vger.kernel.org
Fixes: 6c29f57ea4
("IB/mlx5: Device memory mr registration support")
Link: https://lore.kernel.org/r/20201203190807.127189-1-leon@kernel.org
Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
This commit is contained in:
parent
53ef4999f0
commit
ca991a7d14
@ -669,7 +669,6 @@ struct mlx5_ib_mr {
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struct mlx5_shared_mr_info *smr_info;
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struct list_head list;
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struct mlx5_cache_ent *cache_ent;
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struct mlx5_ib_dev *dev;
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u32 out[MLX5_ST_SZ_DW(create_mkey_out)];
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struct mlx5_core_sig_ctx *sig;
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void *descs_alloc;
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@ -1107,6 +1106,11 @@ static inline struct mlx5_ib_dev *to_mdev(struct ib_device *ibdev)
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return container_of(ibdev, struct mlx5_ib_dev, ib_dev);
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}
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static inline struct mlx5_ib_dev *mr_to_mdev(struct mlx5_ib_mr *mr)
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{
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return to_mdev(mr->ibmr.device);
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}
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static inline struct mlx5_ib_dev *mlx5_udata_to_mdev(struct ib_udata *udata)
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{
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struct mlx5_ib_ucontext *context = rdma_udata_to_drv_context(
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@ -137,8 +137,8 @@ static void create_mkey_callback(int status, struct mlx5_async_work *context)
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{
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struct mlx5_ib_mr *mr =
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container_of(context, struct mlx5_ib_mr, cb_work);
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struct mlx5_ib_dev *dev = mr->dev;
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struct mlx5_cache_ent *ent = mr->cache_ent;
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struct mlx5_ib_dev *dev = ent->dev;
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unsigned long flags;
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if (status) {
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@ -176,7 +176,6 @@ static struct mlx5_ib_mr *alloc_cache_mr(struct mlx5_cache_ent *ent, void *mkc)
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if (!mr)
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return NULL;
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mr->cache_ent = ent;
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mr->dev = ent->dev;
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set_mkc_access_pd_addr_fields(mkc, 0, 0, ent->dev->umrc.pd);
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MLX5_SET(mkc, mkc, free, 1);
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@ -931,6 +930,7 @@ static void set_mr_fields(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr,
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mr->ibmr.lkey = mr->mmkey.key;
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mr->ibmr.rkey = mr->mmkey.key;
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mr->ibmr.length = length;
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mr->ibmr.device = &dev->ib_dev;
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mr->access_flags = access_flags;
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}
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@ -1062,7 +1062,7 @@ static void *mlx5_ib_create_xlt_wr(struct mlx5_ib_mr *mr,
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size_t nents, size_t ent_size,
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unsigned int flags)
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{
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struct mlx5_ib_dev *dev = mr->dev;
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struct mlx5_ib_dev *dev = mr_to_mdev(mr);
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struct device *ddev = &dev->mdev->pdev->dev;
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dma_addr_t dma;
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void *xlt;
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@ -1124,7 +1124,7 @@ static unsigned int xlt_wr_final_send_flags(unsigned int flags)
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int mlx5_ib_update_xlt(struct mlx5_ib_mr *mr, u64 idx, int npages,
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int page_shift, int flags)
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{
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struct mlx5_ib_dev *dev = mr->dev;
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struct mlx5_ib_dev *dev = mr_to_mdev(mr);
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struct device *ddev = &dev->mdev->pdev->dev;
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void *xlt;
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struct mlx5_umr_wr wr;
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@ -1203,7 +1203,7 @@ int mlx5_ib_update_xlt(struct mlx5_ib_mr *mr, u64 idx, int npages,
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*/
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static int mlx5_ib_update_mr_pas(struct mlx5_ib_mr *mr, unsigned int flags)
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{
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struct mlx5_ib_dev *dev = mr->dev;
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struct mlx5_ib_dev *dev = mr_to_mdev(mr);
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struct device *ddev = &dev->mdev->pdev->dev;
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struct ib_block_iter biter;
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struct mlx5_mtt *cur_mtt;
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@ -1335,7 +1335,6 @@ static struct mlx5_ib_mr *reg_create(struct ib_pd *pd, struct ib_umem *umem,
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}
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mr->mmkey.type = MLX5_MKEY_MR;
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mr->desc_size = sizeof(struct mlx5_mtt);
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mr->dev = dev;
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mr->umem = umem;
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set_mr_fields(dev, mr, umem->length, access_flags);
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kvfree(in);
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@ -1579,17 +1578,17 @@ int mlx5_mr_cache_invalidate(struct mlx5_ib_mr *mr)
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{
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struct mlx5_umr_wr umrwr = {};
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if (mr->dev->mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
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if (mr_to_mdev(mr)->mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
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return 0;
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umrwr.wr.send_flags = MLX5_IB_SEND_UMR_DISABLE_MR |
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MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS;
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umrwr.wr.opcode = MLX5_IB_WR_UMR;
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umrwr.pd = mr->dev->umrc.pd;
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umrwr.pd = mr_to_mdev(mr)->umrc.pd;
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umrwr.mkey = mr->mmkey.key;
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umrwr.ignore_free_state = 1;
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return mlx5_ib_post_send_wait(mr->dev, &umrwr);
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return mlx5_ib_post_send_wait(mr_to_mdev(mr), &umrwr);
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}
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/*
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@ -102,7 +102,7 @@ static void populate_klm(struct mlx5_klm *pklm, size_t idx, size_t nentries,
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if (flags & MLX5_IB_UPD_XLT_ZAP) {
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for (; pklm != end; pklm++, idx++) {
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pklm->bcount = cpu_to_be32(MLX5_IMR_MTT_SIZE);
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pklm->key = cpu_to_be32(imr->dev->null_mkey);
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pklm->key = cpu_to_be32(mr_to_mdev(imr)->null_mkey);
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pklm->va = 0;
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}
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return;
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@ -129,7 +129,7 @@ static void populate_klm(struct mlx5_klm *pklm, size_t idx, size_t nentries,
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* locking around the xarray.
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*/
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lockdep_assert_held(&to_ib_umem_odp(imr->umem)->umem_mutex);
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lockdep_assert_held(&imr->dev->odp_srcu);
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lockdep_assert_held(&mr_to_mdev(imr)->odp_srcu);
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for (; pklm != end; pklm++, idx++) {
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struct mlx5_ib_mr *mtt = xa_load(&imr->implicit_children, idx);
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@ -139,7 +139,7 @@ static void populate_klm(struct mlx5_klm *pklm, size_t idx, size_t nentries,
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pklm->key = cpu_to_be32(mtt->ibmr.lkey);
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pklm->va = cpu_to_be64(idx * MLX5_IMR_MTT_SIZE);
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} else {
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pklm->key = cpu_to_be32(imr->dev->null_mkey);
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pklm->key = cpu_to_be32(mr_to_mdev(imr)->null_mkey);
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pklm->va = 0;
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}
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}
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@ -199,7 +199,7 @@ static void dma_fence_odp_mr(struct mlx5_ib_mr *mr)
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mutex_unlock(&odp->umem_mutex);
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if (!mr->cache_ent) {
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mlx5_core_destroy_mkey(mr->dev->mdev, &mr->mmkey);
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mlx5_core_destroy_mkey(mr_to_mdev(mr)->mdev, &mr->mmkey);
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WARN_ON(mr->descs);
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}
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}
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@ -222,19 +222,19 @@ static void free_implicit_child_mr(struct mlx5_ib_mr *mr, bool need_imr_xlt)
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WARN_ON(atomic_read(&mr->num_deferred_work));
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if (need_imr_xlt) {
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srcu_key = srcu_read_lock(&mr->dev->odp_srcu);
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srcu_key = srcu_read_lock(&mr_to_mdev(mr)->odp_srcu);
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mutex_lock(&odp_imr->umem_mutex);
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mlx5_ib_update_xlt(mr->parent, idx, 1, 0,
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MLX5_IB_UPD_XLT_INDIRECT |
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MLX5_IB_UPD_XLT_ATOMIC);
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mutex_unlock(&odp_imr->umem_mutex);
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srcu_read_unlock(&mr->dev->odp_srcu, srcu_key);
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srcu_read_unlock(&mr_to_mdev(mr)->odp_srcu, srcu_key);
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}
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dma_fence_odp_mr(mr);
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mr->parent = NULL;
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mlx5_mr_cache_free(mr->dev, mr);
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mlx5_mr_cache_free(mr_to_mdev(mr), mr);
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ib_umem_odp_release(odp);
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if (atomic_dec_and_test(&imr->num_deferred_work))
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wake_up(&imr->q_deferred_work);
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@ -274,7 +274,7 @@ static void destroy_unused_implicit_child_mr(struct mlx5_ib_mr *mr)
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goto out_unlock;
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atomic_inc(&imr->num_deferred_work);
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call_srcu(&mr->dev->odp_srcu, &mr->odp_destroy.rcu,
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call_srcu(&mr_to_mdev(mr)->odp_srcu, &mr->odp_destroy.rcu,
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free_implicit_child_mr_rcu);
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out_unlock:
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@ -476,12 +476,13 @@ static struct mlx5_ib_mr *implicit_get_child_mr(struct mlx5_ib_mr *imr,
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if (IS_ERR(odp))
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return ERR_CAST(odp);
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ret = mr = mlx5_mr_cache_alloc(imr->dev, MLX5_IMR_MTT_CACHE_ENTRY,
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imr->access_flags);
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ret = mr = mlx5_mr_cache_alloc(
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mr_to_mdev(imr), MLX5_IMR_MTT_CACHE_ENTRY, imr->access_flags);
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if (IS_ERR(mr))
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goto out_umem;
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mr->ibmr.pd = imr->ibmr.pd;
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mr->ibmr.device = &mr_to_mdev(imr)->ib_dev;
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mr->umem = &odp->umem;
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mr->ibmr.lkey = mr->mmkey.key;
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mr->ibmr.rkey = mr->mmkey.key;
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@ -517,11 +518,11 @@ static struct mlx5_ib_mr *implicit_get_child_mr(struct mlx5_ib_mr *imr,
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goto out_mr;
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}
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mlx5_ib_dbg(imr->dev, "key %x mr %p\n", mr->mmkey.key, mr);
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mlx5_ib_dbg(mr_to_mdev(imr), "key %x mr %p\n", mr->mmkey.key, mr);
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return mr;
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out_mr:
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mlx5_mr_cache_free(imr->dev, mr);
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mlx5_mr_cache_free(mr_to_mdev(imr), mr);
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out_umem:
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ib_umem_odp_release(odp);
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return ret;
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@ -555,6 +556,7 @@ struct mlx5_ib_mr *mlx5_ib_alloc_implicit_mr(struct mlx5_ib_pd *pd,
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imr->umem = &umem_odp->umem;
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imr->ibmr.lkey = imr->mmkey.key;
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imr->ibmr.rkey = imr->mmkey.key;
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imr->ibmr.device = &dev->ib_dev;
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imr->umem = &umem_odp->umem;
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imr->is_odp_implicit = true;
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atomic_set(&imr->num_deferred_work, 0);
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@ -588,7 +590,7 @@ out_umem:
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void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *imr)
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{
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struct ib_umem_odp *odp_imr = to_ib_umem_odp(imr->umem);
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struct mlx5_ib_dev *dev = imr->dev;
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struct mlx5_ib_dev *dev = mr_to_mdev(imr);
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struct list_head destroy_list;
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struct mlx5_ib_mr *mtt;
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struct mlx5_ib_mr *tmp;
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@ -658,10 +660,10 @@ void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *imr)
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void mlx5_ib_fence_odp_mr(struct mlx5_ib_mr *mr)
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{
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/* Prevent new page faults and prefetch requests from succeeding */
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xa_erase(&mr->dev->odp_mkeys, mlx5_base_mkey(mr->mmkey.key));
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xa_erase(&mr_to_mdev(mr)->odp_mkeys, mlx5_base_mkey(mr->mmkey.key));
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/* Wait for all running page-fault handlers to finish. */
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synchronize_srcu(&mr->dev->odp_srcu);
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synchronize_srcu(&mr_to_mdev(mr)->odp_srcu);
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wait_event(mr->q_deferred_work, !atomic_read(&mr->num_deferred_work));
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@ -705,7 +707,7 @@ static int pagefault_real_mr(struct mlx5_ib_mr *mr, struct ib_umem_odp *odp,
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if (ret < 0) {
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if (ret != -EAGAIN)
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mlx5_ib_err(mr->dev,
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mlx5_ib_err(mr_to_mdev(mr),
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"Failed to update mkey page tables\n");
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goto out;
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}
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@ -795,7 +797,7 @@ out:
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MLX5_IB_UPD_XLT_ATOMIC);
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mutex_unlock(&odp_imr->umem_mutex);
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if (err) {
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mlx5_ib_err(imr->dev, "Failed to update PAS\n");
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mlx5_ib_err(mr_to_mdev(imr), "Failed to update PAS\n");
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return err;
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}
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return ret;
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@ -815,7 +817,7 @@ static int pagefault_mr(struct mlx5_ib_mr *mr, u64 io_virt, size_t bcnt,
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{
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struct ib_umem_odp *odp = to_ib_umem_odp(mr->umem);
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lockdep_assert_held(&mr->dev->odp_srcu);
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lockdep_assert_held(&mr_to_mdev(mr)->odp_srcu);
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if (unlikely(io_virt < mr->mmkey.iova))
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return -EFAULT;
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@ -1783,7 +1785,7 @@ static void mlx5_ib_prefetch_mr_work(struct work_struct *w)
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/* We rely on IB/core that work is executed if we have num_sge != 0 only. */
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WARN_ON(!work->num_sge);
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dev = work->frags[0].mr->dev;
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dev = mr_to_mdev(work->frags[0].mr);
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/* SRCU should be held when calling to mlx5_odp_populate_xlt() */
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srcu_key = srcu_read_lock(&dev->odp_srcu);
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for (i = 0; i < work->num_sge; ++i) {
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@ -116,7 +116,7 @@ static int fill_res_mr_entry_raw(struct sk_buff *msg, struct ib_mr *ibmr)
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{
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struct mlx5_ib_mr *mr = to_mmr(ibmr);
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return fill_res_raw(msg, mr->dev, MLX5_SGMT_TYPE_PRM_QUERY_MKEY,
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return fill_res_raw(msg, mr_to_mdev(mr), MLX5_SGMT_TYPE_PRM_QUERY_MKEY,
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mlx5_mkey_to_idx(mr->mmkey.key));
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}
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