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Revert "crypto: aegis128 - add support for SIMD acceleration"
This reverts commitecc8bc81f2("crypto: aegis128 - provide a SIMD implementation based on NEON intrinsics") and commit7cdc0ddbf7("crypto: aegis128 - add support for SIMD acceleration"). They cause compile errors on platforms other than ARM because the mechanism to selectively compile the SIMD code is broken. Repoted-by: Heiko Carstens <heiko.carstens@de.ibm.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Herbert Xu
parent
82cb548568
commit
c9f1fd4f2f
@ -306,11 +306,6 @@ config CRYPTO_AEGIS128
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help
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Support for the AEGIS-128 dedicated AEAD algorithm.
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config CRYPTO_AEGIS128_SIMD
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bool "Support SIMD acceleration for AEGIS-128"
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depends on CRYPTO_AEGIS128 && ((ARM || ARM64) && KERNEL_MODE_NEON)
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default y
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config CRYPTO_AEGIS128_AESNI_SSE2
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tristate "AEGIS-128 AEAD algorithm (x86_64 AESNI+SSE2 implementation)"
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depends on X86 && 64BIT
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@ -90,18 +90,6 @@ obj-$(CONFIG_CRYPTO_GCM) += gcm.o
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obj-$(CONFIG_CRYPTO_CCM) += ccm.o
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obj-$(CONFIG_CRYPTO_CHACHA20POLY1305) += chacha20poly1305.o
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obj-$(CONFIG_CRYPTO_AEGIS128) += aegis128.o
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aegis128-y := aegis128-core.o
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ifeq ($(ARCH),arm)
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CFLAGS_aegis128-neon-inner.o += -ffreestanding -march=armv7-a -mfloat-abi=softfp -mfpu=crypto-neon-fp-armv8
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aegis128-$(CONFIG_CRYPTO_AEGIS128_SIMD) += aegis128-neon.o aegis128-neon-inner.o
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endif
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ifeq ($(ARCH),arm64)
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CFLAGS_aegis128-neon-inner.o += -ffreestanding -mcpu=generic+crypto
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CFLAGS_REMOVE_aegis128-neon-inner.o += -mgeneral-regs-only
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aegis128-$(CONFIG_CRYPTO_AEGIS128_SIMD) += aegis128-neon.o aegis128-neon-inner.o
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endif
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obj-$(CONFIG_CRYPTO_PCRYPT) += pcrypt.o
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obj-$(CONFIG_CRYPTO_CRYPTD) += cryptd.o
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obj-$(CONFIG_CRYPTO_DES) += des_generic.o
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@ -1,149 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2019 Linaro, Ltd. <ard.biesheuvel@linaro.org>
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*/
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#ifdef CONFIG_ARM64
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#include <asm/neon-intrinsics.h>
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#define AES_ROUND "aese %0.16b, %1.16b \n\t aesmc %0.16b, %0.16b"
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#else
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#include <arm_neon.h>
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#define AES_ROUND "aese.8 %q0, %q1 \n\t aesmc.8 %q0, %q0"
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#endif
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#define AEGIS_BLOCK_SIZE 16
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#include <stddef.h>
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void *memcpy(void *dest, const void *src, size_t n);
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void *memset(void *s, int c, size_t n);
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struct aegis128_state {
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uint8x16_t v[5];
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};
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static struct aegis128_state aegis128_load_state_neon(const void *state)
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{
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return (struct aegis128_state){ {
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vld1q_u8(state),
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vld1q_u8(state + 16),
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vld1q_u8(state + 32),
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vld1q_u8(state + 48),
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vld1q_u8(state + 64)
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} };
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}
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static void aegis128_save_state_neon(struct aegis128_state st, void *state)
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{
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vst1q_u8(state, st.v[0]);
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vst1q_u8(state + 16, st.v[1]);
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vst1q_u8(state + 32, st.v[2]);
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vst1q_u8(state + 48, st.v[3]);
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vst1q_u8(state + 64, st.v[4]);
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}
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static uint8x16_t aegis_aes_round(uint8x16_t w)
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{
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uint8x16_t z = {};
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/*
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* We use inline asm here instead of the vaeseq_u8/vaesmcq_u8 intrinsics
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* to force the compiler to issue the aese/aesmc instructions in pairs.
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* This is much faster on many cores, where the instruction pair can
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* execute in a single cycle.
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*/
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asm(AES_ROUND : "+w"(w) : "w"(z));
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return w;
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}
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static struct aegis128_state aegis128_update_neon(struct aegis128_state st,
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uint8x16_t m)
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{
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uint8x16_t t;
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t = aegis_aes_round(st.v[3]);
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st.v[3] ^= aegis_aes_round(st.v[2]);
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st.v[2] ^= aegis_aes_round(st.v[1]);
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st.v[1] ^= aegis_aes_round(st.v[0]);
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st.v[0] ^= aegis_aes_round(st.v[4]) ^ m;
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st.v[4] ^= t;
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return st;
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}
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void crypto_aegis128_update_neon(void *state, const void *msg)
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{
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struct aegis128_state st = aegis128_load_state_neon(state);
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st = aegis128_update_neon(st, vld1q_u8(msg));
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aegis128_save_state_neon(st, state);
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}
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void crypto_aegis128_encrypt_chunk_neon(void *state, void *dst, const void *src,
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unsigned int size)
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{
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struct aegis128_state st = aegis128_load_state_neon(state);
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uint8x16_t tmp;
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while (size >= AEGIS_BLOCK_SIZE) {
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uint8x16_t s = vld1q_u8(src);
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tmp = s ^ st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4];
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st = aegis128_update_neon(st, s);
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vst1q_u8(dst, tmp);
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size -= AEGIS_BLOCK_SIZE;
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src += AEGIS_BLOCK_SIZE;
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dst += AEGIS_BLOCK_SIZE;
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}
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if (size > 0) {
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uint8_t buf[AEGIS_BLOCK_SIZE] = {};
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uint8x16_t msg;
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memcpy(buf, src, size);
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msg = vld1q_u8(buf);
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tmp = msg ^ st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4];
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st = aegis128_update_neon(st, msg);
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vst1q_u8(buf, tmp);
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memcpy(dst, buf, size);
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}
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aegis128_save_state_neon(st, state);
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}
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void crypto_aegis128_decrypt_chunk_neon(void *state, void *dst, const void *src,
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unsigned int size)
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{
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struct aegis128_state st = aegis128_load_state_neon(state);
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uint8x16_t tmp;
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while (size >= AEGIS_BLOCK_SIZE) {
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tmp = vld1q_u8(src) ^ st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4];
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st = aegis128_update_neon(st, tmp);
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vst1q_u8(dst, tmp);
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size -= AEGIS_BLOCK_SIZE;
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src += AEGIS_BLOCK_SIZE;
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dst += AEGIS_BLOCK_SIZE;
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}
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if (size > 0) {
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uint8_t buf[AEGIS_BLOCK_SIZE] = {};
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uint8x16_t msg;
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memcpy(buf, src, size);
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msg = vld1q_u8(buf) ^ st.v[1] ^ (st.v[2] & st.v[3]) ^ st.v[4];
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vst1q_u8(buf, msg);
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memcpy(dst, buf, size);
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memset(buf + size, 0, AEGIS_BLOCK_SIZE - size);
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msg = vld1q_u8(buf);
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st = aegis128_update_neon(st, msg);
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}
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aegis128_save_state_neon(st, state);
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}
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@ -1,43 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2019 Linaro Ltd <ard.biesheuvel@linaro.org>
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*/
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#include <asm/cpufeature.h>
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#include <asm/neon.h>
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#include "aegis.h"
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void crypto_aegis128_update_neon(void *state, const void *msg);
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void crypto_aegis128_encrypt_chunk_neon(void *state, void *dst, const void *src,
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unsigned int size);
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void crypto_aegis128_decrypt_chunk_neon(void *state, void *dst, const void *src,
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unsigned int size);
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bool crypto_aegis128_have_simd(void)
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{
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return cpu_have_feature(cpu_feature(AES));
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}
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void crypto_aegis128_update_simd(union aegis_block *state, const void *msg)
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{
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kernel_neon_begin();
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crypto_aegis128_update_neon(state, msg);
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kernel_neon_end();
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}
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void crypto_aegis128_encrypt_chunk_simd(union aegis_block *state, u8 *dst,
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const u8 *src, unsigned int size)
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{
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kernel_neon_begin();
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crypto_aegis128_encrypt_chunk_neon(state, dst, src, size);
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kernel_neon_end();
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}
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void crypto_aegis128_decrypt_chunk_simd(union aegis_block *state, u8 *dst,
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const u8 *src, unsigned int size)
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{
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kernel_neon_begin();
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crypto_aegis128_decrypt_chunk_neon(state, dst, src, size);
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kernel_neon_end();
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}
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@ -8,7 +8,6 @@
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#include <crypto/algapi.h>
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#include <crypto/internal/aead.h>
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#include <crypto/internal/simd.h>
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#include <crypto/internal/skcipher.h>
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#include <crypto/scatterwalk.h>
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#include <linux/err.h>
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@ -16,7 +15,6 @@
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/scatterlist.h>
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#include <asm/simd.h>
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#include "aegis.h"
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@ -42,15 +40,6 @@ struct aegis128_ops {
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const u8 *src, unsigned int size);
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};
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static bool have_simd;
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bool crypto_aegis128_have_simd(void);
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void crypto_aegis128_update_simd(struct aegis_state *state, const void *msg);
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void crypto_aegis128_encrypt_chunk_simd(struct aegis_state *state, u8 *dst,
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const u8 *src, unsigned int size);
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void crypto_aegis128_decrypt_chunk_simd(struct aegis_state *state, u8 *dst,
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const u8 *src, unsigned int size);
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static void crypto_aegis128_update(struct aegis_state *state)
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{
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union aegis_block tmp;
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@ -66,22 +55,12 @@ static void crypto_aegis128_update(struct aegis_state *state)
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static void crypto_aegis128_update_a(struct aegis_state *state,
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const union aegis_block *msg)
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{
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if (have_simd && crypto_simd_usable()) {
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crypto_aegis128_update_simd(state, msg);
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return;
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}
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crypto_aegis128_update(state);
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crypto_aegis_block_xor(&state->blocks[0], msg);
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}
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static void crypto_aegis128_update_u(struct aegis_state *state, const void *msg)
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{
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if (have_simd && crypto_simd_usable()) {
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crypto_aegis128_update_simd(state, msg);
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return;
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}
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crypto_aegis128_update(state);
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crypto_xor(state->blocks[0].bytes, msg, AEGIS_BLOCK_SIZE);
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}
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@ -386,7 +365,7 @@ static void crypto_aegis128_crypt(struct aead_request *req,
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static int crypto_aegis128_encrypt(struct aead_request *req)
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{
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const struct aegis128_ops *ops = &(struct aegis128_ops){
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static const struct aegis128_ops ops = {
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.skcipher_walk_init = skcipher_walk_aead_encrypt,
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.crypt_chunk = crypto_aegis128_encrypt_chunk,
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};
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@ -396,12 +375,7 @@ static int crypto_aegis128_encrypt(struct aead_request *req)
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unsigned int authsize = crypto_aead_authsize(tfm);
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unsigned int cryptlen = req->cryptlen;
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if (have_simd && crypto_simd_usable())
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ops = &(struct aegis128_ops){
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.skcipher_walk_init = skcipher_walk_aead_encrypt,
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.crypt_chunk = crypto_aegis128_encrypt_chunk_simd };
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crypto_aegis128_crypt(req, &tag, cryptlen, ops);
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crypto_aegis128_crypt(req, &tag, cryptlen, &ops);
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scatterwalk_map_and_copy(tag.bytes, req->dst, req->assoclen + cryptlen,
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authsize, 1);
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@ -410,7 +384,7 @@ static int crypto_aegis128_encrypt(struct aead_request *req)
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static int crypto_aegis128_decrypt(struct aead_request *req)
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{
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const struct aegis128_ops *ops = &(struct aegis128_ops){
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static const struct aegis128_ops ops = {
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.skcipher_walk_init = skcipher_walk_aead_decrypt,
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.crypt_chunk = crypto_aegis128_decrypt_chunk,
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};
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@ -424,12 +398,7 @@ static int crypto_aegis128_decrypt(struct aead_request *req)
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scatterwalk_map_and_copy(tag.bytes, req->src, req->assoclen + cryptlen,
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authsize, 0);
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if (have_simd && crypto_simd_usable())
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ops = &(struct aegis128_ops){
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.skcipher_walk_init = skcipher_walk_aead_decrypt,
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.crypt_chunk = crypto_aegis128_decrypt_chunk_simd };
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crypto_aegis128_crypt(req, &tag, cryptlen, ops);
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crypto_aegis128_crypt(req, &tag, cryptlen, &ops);
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return crypto_memneq(tag.bytes, zeros, authsize) ? -EBADMSG : 0;
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}
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@ -460,9 +429,6 @@ static struct aead_alg crypto_aegis128_alg = {
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static int __init crypto_aegis128_module_init(void)
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{
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if (IS_ENABLED(CONFIG_CRYPTO_AEGIS128_SIMD))
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have_simd = crypto_aegis128_have_simd();
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return crypto_register_aead(&crypto_aegis128_alg);
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}
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