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cpufreq: imx-cpufreq-dt: Correct i.MX8MP's market segment fuse location
i.MX8MP's market segment fuse field is bit[6:5], correct it.
Fixes: 83fe39ad0a
("cpufreq: imx-cpufreq-dt: Add i.MX8MP support")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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4bd8459b6c
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c98330446c
@ -19,6 +19,8 @@
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#define IMX8MN_OCOTP_CFG3_SPEED_GRADE_MASK (0xf << 8)
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#define OCOTP_CFG3_MKT_SEGMENT_SHIFT 6
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#define OCOTP_CFG3_MKT_SEGMENT_MASK (0x3 << 6)
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#define IMX8MP_OCOTP_CFG3_MKT_SEGMENT_SHIFT 5
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#define IMX8MP_OCOTP_CFG3_MKT_SEGMENT_MASK (0x3 << 5)
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/* cpufreq-dt device registered by imx-cpufreq-dt */
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static struct platform_device *cpufreq_dt_pdev;
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@ -45,7 +47,13 @@ static int imx_cpufreq_dt_probe(struct platform_device *pdev)
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else
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speed_grade = (cell_value & OCOTP_CFG3_SPEED_GRADE_MASK)
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>> OCOTP_CFG3_SPEED_GRADE_SHIFT;
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mkt_segment = (cell_value & OCOTP_CFG3_MKT_SEGMENT_MASK) >> OCOTP_CFG3_MKT_SEGMENT_SHIFT;
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if (of_machine_is_compatible("fsl,imx8mp"))
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mkt_segment = (cell_value & IMX8MP_OCOTP_CFG3_MKT_SEGMENT_MASK)
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>> IMX8MP_OCOTP_CFG3_MKT_SEGMENT_SHIFT;
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else
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mkt_segment = (cell_value & OCOTP_CFG3_MKT_SEGMENT_MASK)
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>> OCOTP_CFG3_MKT_SEGMENT_SHIFT;
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/*
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* Early samples without fuses written report "0 0" which may NOT
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