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ARM: l2c: prima2: remove cache size override

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The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP.  Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code.  Remove them so we can find out which really need
this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2014-03-19 12:14:18 +00:00
parent d941f86fad
commit c95680e6f5
1 changed files with 2 additions and 20 deletions
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22
arch/arm/mach-prima2/l2x0.c
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@ -11,21 +11,6 @@
#include <linux/of.h> #include <linux/of.h>
#include <asm/hardware/cache-l2x0.h> #include <asm/hardware/cache-l2x0.h>
struct l2x0_aux {
u32 val;
u32 mask;
};
static const struct l2x0_aux prima2_l2x0_aux __initconst = {
.val = L2C_AUX_CTRL_WAY_SIZE(2),
.mask = 0,
};
static const struct l2x0_aux marco_l2x0_aux __initconst = {
.val = L2C_AUX_CTRL_WAY_SIZE(2) | L310_AUX_CTRL_ASSOCIATIVITY_16,
.mask = L2X0_AUX_CTRL_MASK,
};
static const struct of_device_id sirf_l2x0_ids[] __initconst = { static const struct of_device_id sirf_l2x0_ids[] __initconst = {
{ .compatible = "sirf,prima2-pl310-cache", .data = &prima2_l2x0_aux, }, { .compatible = "sirf,prima2-pl310-cache", .data = &prima2_l2x0_aux, },
{ .compatible = "sirf,marco-pl310-cache", .data = &marco_l2x0_aux, }, { .compatible = "sirf,marco-pl310-cache", .data = &marco_l2x0_aux, },
@ -35,13 +20,10 @@ static const struct of_device_id sirf_l2x0_ids[] __initconst = {
static int __init sirfsoc_l2x0_init(void) static int __init sirfsoc_l2x0_init(void)
{ {
struct device_node *np; struct device_node *np;
const struct l2x0_aux *aux;
np = of_find_matching_node(NULL, sirf_l2x0_ids); np = of_find_matching_node(NULL, sirf_l2x0_ids);
if (np) { if (np)
aux = of_match_node(sirf_l2x0_ids, np)->data; return l2x0_of_init(0, ~0);
return l2x0_of_init(aux->val, aux->mask);
}
return 0; return 0;
} }