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[POWERPC] spufs: serialize SLB invalidation against SLB loading
There is a potential race between flushes of the entire SLB in the MFC and the point where new entries are being established. The problem is that we might put a ESID entry into the MFC SLB when the VSID entry has just been cleared by the global flush. This can be circumvented by holding the register_lock throughout both the flushing and the creation of SLB entries. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
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@ -81,9 +81,12 @@ struct spu_slb {
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void spu_invalidate_slbs(struct spu *spu)
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{
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struct spu_priv2 __iomem *priv2 = spu->priv2;
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unsigned long flags;
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spin_lock_irqsave(&spu->register_lock, flags);
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if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
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out_be64(&priv2->slb_invalidate_all_W, 0UL);
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spin_unlock_irqrestore(&spu->register_lock, flags);
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}
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EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
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@ -294,9 +297,11 @@ void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
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nr_slbs++;
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}
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spin_lock_irq(&spu->register_lock);
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/* Add the set of SLBs */
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for (i = 0; i < nr_slbs; i++)
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spu_load_slb(spu, i, &slbs[i]);
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spin_unlock_irq(&spu->register_lock);
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}
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EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
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@ -341,13 +346,14 @@ spu_irq_class_1(int irq, void *data)
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if (stat & CLASS1_STORAGE_FAULT_INTR)
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spu_mfc_dsisr_set(spu, 0ul);
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spu_int_stat_clear(spu, 1, stat);
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spin_unlock(&spu->register_lock);
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pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
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dar, dsisr);
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if (stat & CLASS1_SEGMENT_FAULT_INTR)
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__spu_trap_data_seg(spu, dar);
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spin_unlock(&spu->register_lock);
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pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
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dar, dsisr);
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if (stat & CLASS1_STORAGE_FAULT_INTR)
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__spu_trap_data_map(spu, dar, dsisr);
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