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arm64 fixes:
- switch_mm() fix where init_mm.pgd ends up in the user TTBR0; swapper_pg_dir is not suitable for user mappings - this_cpu accessors fix for preemption safety -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVEag5AAoJEGvWsS0AyF7xA2gP/3x/Qh3iaON3v5zlP6gMFlzQ i5L0k4GXdowbMixhe+2PifYg54JvRoDQpjobpOXKwUOPrsHSQHKhdo6PELf/EDA6 bmuak45GeayP5s4LvIDrm8zIoToF3DzIsvT2d9rPLcA5E0jLOZr9mFcJyCu81jwG JJFea4a4oWnfzETFx86NHLHkxMTokL+TqeLkHPNDm6ZY+ajMPOMR6COvlCBNkGkD 0s3s6yKQefL9q/3OzhJOGfIQghQWAR6oQUqKNvABmeeOtyUC3KApAdFk+3v+fOaV nAf3thImnd7YdBSC34qCbKAPGvUQZAZbqkMBdtOl6Yk0xMilPb5AVh/5M45++GKd 64rQrDdDRlYEwpThoHceMOSMUY2gKL+KZr7HuK1ZDnQzGrD7yro9V/LRzdpPHcXN wfrO2xfAF4wowj5AhhSkJ6n1TolrpIkUj0dNyAmiQ7qh9J2LS7HgDSvBXCRaHP/y z7kNrybqpWMCa3Xg7Tez6K/pV1ObHK2MufLk3wsBL5JuPoxpLmqwhtQABWFwoMks lQ4y3QweQktGhhp1ZN1Rn93vTOsK4tZrONnwvRmZE/mM5N+ELxVZxfrFcuPWUAcG y1WiXKVXnXZ/MxgYj5XLTxjCB6K0Rpz4ywE1GfdJKReBbW5l99kzXEYLoTVzD0am 3wallsQqIFPErQ6pbgEw =MQxz -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull two arm64 fixes from Catalin Marinas: - switch_mm() fix where init_mm.pgd ends up in the user TTBR0; swapper_pg_dir is not suitable for user mappings - this_cpu accessors fix for preemption safety * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: percpu: Make this_cpu accessors pre-empt safe arm64: Use the reserved TTBR0 if context switching to the init_mm
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commit
c875f42109
@ -246,14 +246,30 @@ static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,
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__ret; \
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})
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#define this_cpu_cmpxchg_1(ptr, o, n) cmpxchg_local(raw_cpu_ptr(&(ptr)), o, n)
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#define this_cpu_cmpxchg_2(ptr, o, n) cmpxchg_local(raw_cpu_ptr(&(ptr)), o, n)
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#define this_cpu_cmpxchg_4(ptr, o, n) cmpxchg_local(raw_cpu_ptr(&(ptr)), o, n)
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#define this_cpu_cmpxchg_8(ptr, o, n) cmpxchg_local(raw_cpu_ptr(&(ptr)), o, n)
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#define _protect_cmpxchg_local(pcp, o, n) \
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({ \
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typeof(*raw_cpu_ptr(&(pcp))) __ret; \
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preempt_disable(); \
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__ret = cmpxchg_local(raw_cpu_ptr(&(pcp)), o, n); \
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preempt_enable(); \
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__ret; \
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})
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#define this_cpu_cmpxchg_double_8(ptr1, ptr2, o1, o2, n1, n2) \
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cmpxchg_double_local(raw_cpu_ptr(&(ptr1)), raw_cpu_ptr(&(ptr2)), \
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o1, o2, n1, n2)
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#define this_cpu_cmpxchg_1(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
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#define this_cpu_cmpxchg_2(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
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#define this_cpu_cmpxchg_4(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
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#define this_cpu_cmpxchg_8(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
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#define this_cpu_cmpxchg_double_8(ptr1, ptr2, o1, o2, n1, n2) \
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({ \
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int __ret; \
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preempt_disable(); \
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__ret = cmpxchg_double_local( raw_cpu_ptr(&(ptr1)), \
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raw_cpu_ptr(&(ptr2)), \
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o1, o2, n1, n2); \
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preempt_enable(); \
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__ret; \
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})
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#define cmpxchg64(ptr,o,n) cmpxchg((ptr),(o),(n))
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#define cmpxchg64_local(ptr,o,n) cmpxchg_local((ptr),(o),(n))
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@ -151,6 +151,15 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
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{
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unsigned int cpu = smp_processor_id();
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/*
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* init_mm.pgd does not contain any user mappings and it is always
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* active for kernel addresses in TTBR1. Just set the reserved TTBR0.
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*/
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if (next == &init_mm) {
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cpu_set_reserved_ttbr0();
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return;
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}
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if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next)
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check_and_switch_context(next, tsk);
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}
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@ -204,25 +204,47 @@ static inline unsigned long __percpu_xchg(void *ptr, unsigned long val,
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return ret;
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}
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#define _percpu_add(pcp, val) \
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__percpu_add(raw_cpu_ptr(&(pcp)), val, sizeof(pcp))
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#define _percpu_read(pcp) \
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({ \
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typeof(pcp) __retval; \
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preempt_disable(); \
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__retval = (typeof(pcp))__percpu_read(raw_cpu_ptr(&(pcp)), \
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sizeof(pcp)); \
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preempt_enable(); \
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__retval; \
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})
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#define _percpu_add_return(pcp, val) (typeof(pcp)) (_percpu_add(pcp, val))
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#define _percpu_write(pcp, val) \
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do { \
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preempt_disable(); \
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__percpu_write(raw_cpu_ptr(&(pcp)), (unsigned long)(val), \
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sizeof(pcp)); \
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preempt_enable(); \
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} while(0) \
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#define _pcp_protect(operation, pcp, val) \
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({ \
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typeof(pcp) __retval; \
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preempt_disable(); \
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__retval = (typeof(pcp))operation(raw_cpu_ptr(&(pcp)), \
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(val), sizeof(pcp)); \
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preempt_enable(); \
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__retval; \
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})
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#define _percpu_add(pcp, val) \
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_pcp_protect(__percpu_add, pcp, val)
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#define _percpu_add_return(pcp, val) _percpu_add(pcp, val)
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#define _percpu_and(pcp, val) \
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__percpu_and(raw_cpu_ptr(&(pcp)), val, sizeof(pcp))
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_pcp_protect(__percpu_and, pcp, val)
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#define _percpu_or(pcp, val) \
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__percpu_or(raw_cpu_ptr(&(pcp)), val, sizeof(pcp))
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#define _percpu_read(pcp) (typeof(pcp)) \
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(__percpu_read(raw_cpu_ptr(&(pcp)), sizeof(pcp)))
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#define _percpu_write(pcp, val) \
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__percpu_write(raw_cpu_ptr(&(pcp)), (unsigned long)(val), sizeof(pcp))
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_pcp_protect(__percpu_or, pcp, val)
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#define _percpu_xchg(pcp, val) (typeof(pcp)) \
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(__percpu_xchg(raw_cpu_ptr(&(pcp)), (unsigned long)(val), sizeof(pcp)))
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_pcp_protect(__percpu_xchg, pcp, (unsigned long)(val))
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#define this_cpu_add_1(pcp, val) _percpu_add(pcp, val)
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#define this_cpu_add_2(pcp, val) _percpu_add(pcp, val)
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