UniPhier ARM64 SoC DT updates for v5.8

- add DMA controller nodes
 
 - add Akebi96 board support
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Merge tag 'uniphier-dt64-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt

UniPhier ARM64 SoC DT updates for v5.8

- add DMA controller nodes

- add Akebi96 board support

* tag 'uniphier-dt64-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  arm64: dts: uniphier: Add support for Akebi96
  dt-bindings: arm: Add Akebi96 board support
  arm64: dts: uniphier: add #address-cells and #size-cells to SPI nodes
  arm64: dts: uniphier: Stabilize Ethernet RGMII mode of PXs3 ref board
  arm64: dts: uniphier: Add ethernet aliases
  arm64: dts: uniphier: Add XDMAC node

Link: https://lore.kernel.org/r/CAK7LNARUL52pBhg8AD9XeScVqhD8qr2eVEfu4+1v8D+KPyOwNw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-05-21 22:48:15 +02:00
commit c8128b5c07
11 changed files with 253 additions and 0 deletions

View File

@ -51,6 +51,7 @@ properties:
- description: LD20 SoC boards
items:
- enum:
- socionext,uniphier-ld20-akebi96
- socionext,uniphier-ld20-global
- socionext,uniphier-ld20-ref
- const: socionext,uniphier-ld20

View File

@ -2,6 +2,7 @@
dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-ld11-global.dtb \
uniphier-ld11-ref.dtb \
uniphier-ld20-akebi96.dtb \
uniphier-ld20-global.dtb \
uniphier-ld20-ref.dtb \
uniphier-pxs3-ref.dtb

View File

@ -30,6 +30,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
ethernet0 = &eth;
};
memory@80000000 {

View File

@ -29,6 +29,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
ethernet0 = &eth;
};
memory@80000000 {

View File

@ -129,6 +129,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 39 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
@ -140,6 +142,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006100 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
@ -566,6 +570,14 @@
};
};
xdmac: dma-controller@5fc10000 {
compatible = "socionext,uniphier-xdmac";
reg = <0x5fc10000 0x5300>;
interrupts = <0 188 4>;
dma-channels = <16>;
#dma-cells = <2>;
};
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-ld11-aidet";
reg = <0x5fc20000 0x200>;

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@ -0,0 +1,189 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for Akebi96 Development Board
//
// Derived from uniphier-ld20-global.dts.
//
// Copyright (C) 2015-2017 Socionext Inc.
// Copyright (C) 2019-2020 Linaro Ltd.
/dts-v1/;
#include <dt-bindings/gpio/uniphier-gpio.h>
#include "uniphier-ld20.dtsi"
/ {
model = "Akebi96";
compatible = "socionext,uniphier-ld20-akebi96",
"socionext,uniphier-ld20";
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
serial0 = &serial0;
serial1 = &serial1;
serial2 = &serial2;
serial3 = &serial3;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
spi0 = &spi0;
spi1 = &spi1;
spi2 = &spi2;
spi3 = &spi3;
ethernet0 = &eth;
};
memory@80000000 {
device_type = "memory";
reg = <0 0x80000000 0 0xc0000000>;
};
framebuffer@c0000000 {
compatible = "simple-framebuffer";
reg = <0 0xc0000000 0 0x02000000>;
width = <1920>;
height = <1080>;
stride = <7680>;
format = "a8r8g8b8";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
memory@c0000000 {
reg = <0 0xc0000000 0 0x02000000>;
no-map;
};
};
sound {
compatible = "audio-graph-card";
label = "UniPhier LD20";
dais = <&spdif_port0
&comp_spdif_port0>;
};
spdif-out {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
port@0 {
spdif_tx: endpoint {
remote-endpoint = <&spdif_hiecout1>;
};
};
};
comp-spdif-out {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
port@0 {
comp_spdif_tx: endpoint {
remote-endpoint = <&comp_spdif_hiecout1>;
};
};
};
firmware {
optee {
compatible = "linaro,optee-tz";
method = "smc";
};
};
};
&spi3 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
usb-over-spi@0 {
compatible = "maxim,max3421-udc";
reg = <0>;
spi-max-frequency = <12500000>;
interrupt-parent = <&gpio>;
interrupt-names = "udc";
interrupts = <0 2>;
};
};
&serial0 {
/* Onboard USB-UART */
status = "okay";
};
&serial2 {
/* LS connector UART1 */
status = "okay";
};
&serial3 {
/* LS connector UART0 */
status = "okay";
};
&spdif_hiecout1 {
remote-endpoint = <&spdif_tx>;
};
&comp_spdif_hiecout1 {
remote-endpoint = <&comp_spdif_tx>;
};
&i2c0 {
/* LS connector I2C0 */
status = "okay";
};
&i2c1 {
/* LS connector I2C1 */
status = "okay";
};
&eth {
status = "okay";
phy-handle = <&ethphy>;
};
&mdio {
ethphy: ethphy@0 {
reg = <0>;
};
};
&usb {
status = "okay";
};
&pcie {
status = "okay";
};
&gpio {
/* IRQs for Max3421 */
xirq0 {
gpio-hog;
gpios = <UNIPHIER_GPIO_IRQ(0) 1>;
input;
};
xirq10 {
gpio-hog;
gpios = <UNIPHIER_GPIO_IRQ(10) 1>;
input;
};
};
&pinctrl_aout1 {
groups = "aout1b";
};
&pinctrl_uart3 {
groups = "uart3", "uart3_ctsrts";
};

View File

@ -30,6 +30,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
ethernet0 = &eth;
};
memory@80000000 {

View File

@ -29,6 +29,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
ethernet0 = &eth;
};
memory@80000000 {

View File

@ -234,6 +234,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 39 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
@ -245,6 +247,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006100 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
@ -256,6 +260,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006200 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 229 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
@ -267,6 +273,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006300 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 230 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi3>;
@ -664,6 +672,14 @@
};
};
xdmac: dma-controller@5fc10000 {
compatible = "socionext,uniphier-xdmac";
reg = <0x5fc10000 0x5300>;
interrupts = <0 188 4>;
dma-channels = <16>;
#dma-cells = <2>;
};
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-ld20-aidet";
reg = <0x5fc20000 0x200>;

View File

@ -29,6 +29,8 @@
i2c6 = &i2c6;
spi0 = &spi0;
spi1 = &spi1;
ethernet0 = &eth0;
ethernet1 = &eth1;
};
memory@80000000 {
@ -130,3 +132,19 @@
reg = <0>;
};
};
&pinctrl_ether_rgmii {
tx {
pins = "RGMII0_TXCLK", "RGMII0_TXD0", "RGMII0_TXD1",
"RGMII0_TXD2", "RGMII0_TXD3", "RGMII0_TXCTL";
drive-strength = <9>;
};
};
&pinctrl_ether1_rgmii {
tx {
pins = "RGMII1_TXCLK", "RGMII1_TXD0", "RGMII1_TXD1",
"RGMII1_TXD2", "RGMII1_TXD3", "RGMII1_TXCTL";
drive-strength = <9>;
};
};

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@ -193,6 +193,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 39 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
@ -204,6 +206,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006100 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
@ -498,6 +502,14 @@
};
};
xdmac: dma-controller@5fc10000 {
compatible = "socionext,uniphier-xdmac";
reg = <0x5fc10000 0x5300>;
interrupts = <0 188 4>;
dma-channels = <16>;
#dma-cells = <2>;
};
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-pxs3-aidet";
reg = <0x5fc20000 0x200>;