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Two fixes for clock chip drivers:
- A regression fix for the Designware APB timer. A recent change to the error checking code transformed the error condition wrongly so it turned into a fail if good condition. - Fix a clang build fail of the ARM architected timer driver. -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmG1yGETHHRnbHhAbGlu dXRyb25peC5kZQAKCRCmGPVMDXSYoeAdEADHWUKyLftD6dJR2Ntxx0Ekf2bT8YsT exVmKIfRpuTdmqp6XwCxulx3T3Ye2zUZhvKKyaKBLN9ELWopVuujs8twslCjzM03 kTA8jOhcX4b34fXUf4fSUHRinVR5YxoPt8hiM4sekmrFamjV0yjUZr2zTuX9qPDY T5QMT7tNFK6FyM2Hl6CmUybt+/lN2jymMEcfWckL0R0EmYpZjU7fVfebgemJImto YJKFUgCslaOiVbTj3jxOrEx/NdQOE9cma9zAuHtRSaFFxz0rajafKHFpol1RXHH+ 8sb3v5XeNtPUgyX1vE+rf/1Y4O+yZufxL8eVKtODyGQHZMORm92bwOxCqAdiNFv8 OFgiG7XcDnQBSI8CQwG/K/uLChFRGCTLv7ICpzuO20fKtIzsyCxV1zzaQlPzwFxl hzE1kvCQN/auAXBD1ghjzISfMwpj/hXp58d9dry8VoEI4ComUOVO0XbdnWXSm8eh j9PtYGMDWLftBCbbTA+//N2fxI5asdO552m08/+H1tgFK4VeJZxLwmagKyy84frh qcYlY7z99BysAwEwS1JqGO/RwSQ0CYZyHJzLkooPxRpgwOhF0wbPyjcUcnhEDYUM 6rZW/SNNRwVRCESaK5bvU9IjH+UJ0pb3+dbwnRN8RIPfDuOU/n2KgMHE8fOgNxbF QjuW9tDuYXEdCQ== =6LIa -----END PGP SIGNATURE----- Merge tag 'timers-urgent-2021-12-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer fixes from Thomas Gleixner: "Two fixes for clock chip drivers: - A regression fix for the Designware APB timer. A recent change to the error checking code transformed the error condition wrongly so it turned into a fail if good condition. - Fix a clang build fail of the ARM architected timer driver" * tag 'timers-urgent-2021-12-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource/drivers/arm_arch_timer: Force inlining of erratum_set_next_event_generic() clocksource/drivers/dw_apb_timer_of: Fix probe failure
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@ -394,8 +394,13 @@ EXPORT_SYMBOL_GPL(timer_unstable_counter_workaround);
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static atomic_t timer_unstable_counter_workaround_in_use = ATOMIC_INIT(0);
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static void erratum_set_next_event_generic(const int access, unsigned long evt,
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struct clock_event_device *clk)
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/*
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* Force the inlining of this function so that the register accesses
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* can be themselves correctly inlined.
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*/
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static __always_inline
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void erratum_set_next_event_generic(const int access, unsigned long evt,
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struct clock_event_device *clk)
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{
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unsigned long ctrl;
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u64 cval;
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@ -47,7 +47,7 @@ static int __init timer_get_base_and_rate(struct device_node *np,
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pr_warn("pclk for %pOFn is present, but could not be activated\n",
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np);
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if (!of_property_read_u32(np, "clock-freq", rate) &&
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if (!of_property_read_u32(np, "clock-freq", rate) ||
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!of_property_read_u32(np, "clock-frequency", rate))
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return 0;
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