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iio: Add Freescale MMA8452Q 3-axis accelerometer driver
3-axis accelerometer sensor (2/4/8 g) with 12-bit resolution and I2C interface many extra features are unsupported (freefall detection, orientation change, autosleep) datasheet is here: http://cache.freescale.com/files/sensors/doc/data_sheet/MMA8452Q.pdf v2: (thanks to Jonathan Cameron) * use ARRAY_SIZE() Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Peter Meerwald
Jonathan Cameron
parent
88cece46ac
commit
c7eeea93ac
@ -65,4 +65,16 @@ config KXSD9
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Say yes here to build support for the Kionix KXSD9 accelerometer.
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Currently this only supports the device via an SPI interface.
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config MMA8452
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tristate "Freescale MMA8452Q Accelerometer Driver"
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depends on I2C
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select IIO_BUFFER
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select IIO_TRIGGERED_BUFFER
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help
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Say yes here to build support for the Freescale MMA8452Q 3-axis
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accelerometer.
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To compile this driver as a module, choose M here: the module
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will be called mma8452.
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endmenu
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@ -6,6 +6,7 @@
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obj-$(CONFIG_BMA180) += bma180.o
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obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o
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obj-$(CONFIG_KXSD9) += kxsd9.o
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obj-$(CONFIG_MMA8452) += mma8452.o
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obj-$(CONFIG_IIO_ST_ACCEL_3AXIS) += st_accel.o
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st_accel-y := st_accel_core.o
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439
drivers/iio/accel/mma8452.c
Normal file
439
drivers/iio/accel/mma8452.c
Normal file
@ -0,0 +1,439 @@
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/*
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* mma8452.c - Support for Freescale MMA8452Q 3-axis 12-bit accelerometer
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*
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* Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
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*
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* This file is subject to the terms and conditions of version 2 of
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* the GNU General Public License. See the file COPYING in the main
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* directory of this archive for more details.
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*
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* 7-bit I2C slave address 0x1c/0x1d (pin selectable)
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*
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* TODO: interrupt, thresholding, orientation / freefall events, autosleep
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*/
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/delay.h>
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#define MMA8452_STATUS 0x00
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#define MMA8452_OUT_X 0x01 /* MSB first, 12-bit */
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#define MMA8452_OUT_Y 0x03
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#define MMA8452_OUT_Z 0x05
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#define MMA8452_WHO_AM_I 0x0d
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#define MMA8452_DATA_CFG 0x0e
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#define MMA8452_OFF_X 0x2f
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#define MMA8452_OFF_Y 0x30
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#define MMA8452_OFF_Z 0x31
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#define MMA8452_CTRL_REG1 0x2a
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#define MMA8452_CTRL_REG2 0x2b
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#define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
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#define MMA8452_CTRL_DR_MASK (BIT(5) | BIT(4) | BIT(3))
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#define MMA8452_CTRL_DR_SHIFT 3
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#define MMA8452_CTRL_DR_DEFAULT 0x4 /* 50 Hz sample frequency */
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#define MMA8452_CTRL_ACTIVE BIT(0)
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#define MMA8452_DATA_CFG_FS_MASK (BIT(1) | BIT(0))
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#define MMA8452_DATA_CFG_FS_2G 0
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#define MMA8452_DATA_CFG_FS_4G 1
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#define MMA8452_DATA_CFG_FS_8G 2
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#define MMA8452_DEVICE_ID 0x2a
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struct mma8452_data {
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struct i2c_client *client;
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struct mutex lock;
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u8 ctrl_reg1;
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u8 data_cfg;
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};
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static int mma8452_drdy(struct mma8452_data *data)
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{
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int tries = 150;
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while (tries-- > 0) {
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int ret = i2c_smbus_read_byte_data(data->client,
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MMA8452_STATUS);
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if (ret < 0)
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return ret;
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if ((ret & MMA8452_STATUS_DRDY) == MMA8452_STATUS_DRDY)
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return 0;
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msleep(20);
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}
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dev_err(&data->client->dev, "data not ready\n");
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return -EIO;
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}
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static int mma8452_read(struct mma8452_data *data, __be16 buf[3])
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{
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int ret = mma8452_drdy(data);
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if (ret < 0)
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return ret;
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return i2c_smbus_read_i2c_block_data(data->client,
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MMA8452_OUT_X, 3 * sizeof(__be16), (u8 *) buf);
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}
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static ssize_t mma8452_show_int_plus_micros(char *buf,
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const int (*vals)[2], int n)
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{
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size_t len = 0;
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while (n-- > 0)
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len += scnprintf(buf + len, PAGE_SIZE - len,
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"%d.%06d ", vals[n][0], vals[n][1]);
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/* replace trailing space by newline */
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buf[len - 1] = '\n';
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return len;
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}
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static int mma8452_get_int_plus_micros_index(const int (*vals)[2], int n,
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int val, int val2)
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{
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while (n-- > 0)
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if (val == vals[n][0] && val2 == vals[n][1])
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return n;
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return -EINVAL;
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}
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static const int mma8452_samp_freq[8][2] = {
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{800, 0}, {400, 0}, {200, 0}, {100, 0}, {50, 0}, {12, 500000},
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{6, 250000}, {1, 560000}
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};
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static const int mma8452_scales[3][2] = {
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{0, 977}, {0, 1953}, {0, 3906}
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};
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static ssize_t mma8452_show_samp_freq_avail(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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return mma8452_show_int_plus_micros(buf, mma8452_samp_freq,
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ARRAY_SIZE(mma8452_samp_freq));
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}
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static ssize_t mma8452_show_scale_avail(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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return mma8452_show_int_plus_micros(buf, mma8452_scales,
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ARRAY_SIZE(mma8452_scales));
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}
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static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mma8452_show_samp_freq_avail);
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static IIO_DEVICE_ATTR(in_accel_scale_available, S_IRUGO,
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mma8452_show_scale_avail, NULL, 0);
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static int mma8452_get_samp_freq_index(struct mma8452_data *data,
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int val, int val2)
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{
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return mma8452_get_int_plus_micros_index(mma8452_samp_freq,
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ARRAY_SIZE(mma8452_samp_freq), val, val2);
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}
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static int mma8452_get_scale_index(struct mma8452_data *data,
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int val, int val2)
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{
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return mma8452_get_int_plus_micros_index(mma8452_scales,
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ARRAY_SIZE(mma8452_scales), val, val2);
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}
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static int mma8452_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct mma8452_data *data = iio_priv(indio_dev);
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__be16 buffer[3];
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int i, ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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if (iio_buffer_enabled(indio_dev))
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return -EBUSY;
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mutex_lock(&data->lock);
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ret = mma8452_read(data, buffer);
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mutex_unlock(&data->lock);
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if (ret < 0)
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return ret;
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*val = sign_extend32(
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be16_to_cpu(buffer[chan->scan_index]) >> 4, 11);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK;
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*val = mma8452_scales[i][0];
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*val2 = mma8452_scales[i][1];
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return IIO_VAL_INT_PLUS_MICRO;
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case IIO_CHAN_INFO_SAMP_FREQ:
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i = (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >>
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MMA8452_CTRL_DR_SHIFT;
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*val = mma8452_samp_freq[i][0];
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*val2 = mma8452_samp_freq[i][1];
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return IIO_VAL_INT_PLUS_MICRO;
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case IIO_CHAN_INFO_CALIBBIAS:
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ret = i2c_smbus_read_byte_data(data->client, MMA8452_OFF_X +
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chan->scan_index);
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if (ret < 0)
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return ret;
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*val = sign_extend32(ret, 7);
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return IIO_VAL_INT;
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}
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return -EINVAL;
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}
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static int mma8452_standby(struct mma8452_data *data)
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{
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return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
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data->ctrl_reg1 & ~MMA8452_CTRL_ACTIVE);
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}
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static int mma8452_active(struct mma8452_data *data)
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{
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return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
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data->ctrl_reg1);
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}
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static int mma8452_change_config(struct mma8452_data *data, u8 reg, u8 val)
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{
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int ret;
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mutex_lock(&data->lock);
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/* config can only be changed when in standby */
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ret = mma8452_standby(data);
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if (ret < 0)
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goto fail;
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ret = i2c_smbus_write_byte_data(data->client, reg, val);
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if (ret < 0)
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goto fail;
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ret = mma8452_active(data);
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if (ret < 0)
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goto fail;
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ret = 0;
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fail:
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mutex_unlock(&data->lock);
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return ret;
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}
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static int mma8452_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct mma8452_data *data = iio_priv(indio_dev);
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int i;
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if (iio_buffer_enabled(indio_dev))
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return -EBUSY;
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switch (mask) {
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case IIO_CHAN_INFO_SAMP_FREQ:
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i = mma8452_get_samp_freq_index(data, val, val2);
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if (i < 0)
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return -EINVAL;
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data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK;
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data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT;
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return mma8452_change_config(data, MMA8452_CTRL_REG1,
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data->ctrl_reg1);
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case IIO_CHAN_INFO_SCALE:
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i = mma8452_get_scale_index(data, val, val2);
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if (i < 0)
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return -EINVAL;
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data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK;
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data->data_cfg |= i;
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return mma8452_change_config(data, MMA8452_DATA_CFG,
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data->data_cfg);
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case IIO_CHAN_INFO_CALIBBIAS:
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if (val < -128 || val > 127)
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return -EINVAL;
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return mma8452_change_config(data, MMA8452_OFF_X +
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chan->scan_index, val);
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default:
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return -EINVAL;
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}
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}
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static irqreturn_t mma8452_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct mma8452_data *data = iio_priv(indio_dev);
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u8 buffer[16]; /* 3 16-bit channels + padding + ts */
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int ret;
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ret = mma8452_read(data, (__be16 *) buffer);
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if (ret < 0)
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goto done;
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iio_push_to_buffers_with_timestamp(indio_dev, buffer,
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iio_get_time_ns());
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done:
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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#define MMA8452_CHANNEL(axis, idx) { \
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.type = IIO_ACCEL, \
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.modified = 1, \
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.channel2 = IIO_MOD_##axis, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_CALIBBIAS), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
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BIT(IIO_CHAN_INFO_SCALE), \
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.scan_index = idx, \
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.scan_type = { \
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.sign = 's', \
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.realbits = 12, \
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.storagebits = 16, \
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.shift = 4, \
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.endianness = IIO_BE, \
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}, \
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}
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static const struct iio_chan_spec mma8452_channels[] = {
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MMA8452_CHANNEL(X, 0),
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MMA8452_CHANNEL(Y, 1),
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MMA8452_CHANNEL(Z, 2),
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IIO_CHAN_SOFT_TIMESTAMP(3),
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};
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static struct attribute *mma8452_attributes[] = {
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&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
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&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
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NULL
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};
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static const struct attribute_group mma8452_group = {
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.attrs = mma8452_attributes,
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};
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static const struct iio_info mma8452_info = {
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.attrs = &mma8452_group,
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.read_raw = &mma8452_read_raw,
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.write_raw = &mma8452_write_raw,
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.driver_module = THIS_MODULE,
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};
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static const unsigned long mma8452_scan_masks[] = {0x7, 0};
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static int mma8452_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct mma8452_data *data;
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struct iio_dev *indio_dev;
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int ret;
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ret = i2c_smbus_read_byte_data(client, MMA8452_WHO_AM_I);
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if (ret < 0)
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return ret;
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if (ret != MMA8452_DEVICE_ID)
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return -ENODEV;
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indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
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if (!indio_dev)
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return -ENOMEM;
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data = iio_priv(indio_dev);
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data->client = client;
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mutex_init(&data->lock);
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i2c_set_clientdata(client, indio_dev);
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indio_dev->info = &mma8452_info;
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indio_dev->name = id->name;
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indio_dev->dev.parent = &client->dev;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = mma8452_channels;
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indio_dev->num_channels = ARRAY_SIZE(mma8452_channels);
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indio_dev->available_scan_masks = mma8452_scan_masks;
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data->ctrl_reg1 = MMA8452_CTRL_ACTIVE |
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(MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT);
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ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG1,
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data->ctrl_reg1);
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if (ret < 0)
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return ret;
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data->data_cfg = MMA8452_DATA_CFG_FS_2G;
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ret = i2c_smbus_write_byte_data(client, MMA8452_DATA_CFG,
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data->data_cfg);
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if (ret < 0)
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return ret;
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ret = iio_triggered_buffer_setup(indio_dev, NULL,
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mma8452_trigger_handler, NULL);
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if (ret < 0)
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return ret;
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ret = iio_device_register(indio_dev);
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if (ret < 0)
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goto buffer_cleanup;
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return 0;
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buffer_cleanup:
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iio_triggered_buffer_cleanup(indio_dev);
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return ret;
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}
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static int mma8452_remove(struct i2c_client *client)
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{
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struct iio_dev *indio_dev = i2c_get_clientdata(client);
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iio_device_unregister(indio_dev);
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iio_triggered_buffer_cleanup(indio_dev);
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mma8452_standby(iio_priv(indio_dev));
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int mma8452_suspend(struct device *dev)
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{
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return mma8452_standby(iio_priv(i2c_get_clientdata(
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to_i2c_client(dev))));
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}
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static int mma8452_resume(struct device *dev)
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{
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return mma8452_active(iio_priv(i2c_get_clientdata(
|
||||
to_i2c_client(dev))));
|
||||
}
|
||||
|
||||
static SIMPLE_DEV_PM_OPS(mma8452_pm_ops, mma8452_suspend, mma8452_resume);
|
||||
#define MMA8452_PM_OPS (&mma8452_pm_ops)
|
||||
#else
|
||||
#define MMA8452_PM_OPS NULL
|
||||
#endif
|
||||
|
||||
static const struct i2c_device_id mma8452_id[] = {
|
||||
{ "mma8452", 0 },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, mma8452_id);
|
||||
|
||||
static struct i2c_driver mma8452_driver = {
|
||||
.driver = {
|
||||
.name = "mma8452",
|
||||
.pm = MMA8452_PM_OPS,
|
||||
},
|
||||
.probe = mma8452_probe,
|
||||
.remove = mma8452_remove,
|
||||
.id_table = mma8452_id,
|
||||
};
|
||||
module_i2c_driver(mma8452_driver);
|
||||
|
||||
MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
|
||||
MODULE_DESCRIPTION("Freescale MMA8452 accelerometer driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in New Issue
Block a user