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IOMMU Fixes for Linux v5.2-rc4
Including: - Three Fixes for Intel VT-d to fix a potential dead-lock, a formatting fix and a bit setting fix. - One fix for the ARM-SMMU to make it work on some platforms with sub-optimal SMMU emulation. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAl0DaloACgkQK/BELZcB GuNZzw//cqRLfD7Gnk4nyDBKAp3RPH12Tm6aFXkRr0/Y2IDNj0zVkZCOENe+BQhu L8F0Nv0t5C0oUtCbx8nqtMUXqeU4Dvvb+pEuWHE+sH1uqqbwzvXNA1vHbJQy0Yht BJOPf3C/1J3LmwjZm8QjrbMk7+HF//BED8wzdp5Advu3+tJfIEUAErBKty5kg5rv ljXG4DxryOVHswEUu2i1HXLoDvCORCIrfphGFjWhIC7MkMQRRUb5NeHydN0TzCdz XfGH3B32vKXMn/sBmi4zeu3ORtvFGaj94WUsRa72qI6pDBk60mcDzZfF/LuBePhS UQQsmImdvfFlzPNr19Pf51B6s7Sv2Xcr0UiSAXb/GSk/Zvh7TTm0y7H+ZfBIUIa6 5pzWl0wmkk/e9cHrNs6gP2P0UT71xRcCWiko+EZCw7N5cgn/d46I47JMeBzZ57CF cV9zfbI8pqF0kOdG3xIbPA7oYf/trdSP2yoY6P/72A9Z7U5uNDxyPwFlwwIRqgC/ oFLPtEhglmgbPc7/5XrBNPMHbKYRbVLNNHJoy99cqMQybu7vfZ5wh51W0gedLxNR GgDDpbSKHyEdK3bUaaSuZMpHG7dzgUhezV51lOeqn8RUSEX9twO2nBwguhehFS3R ADnxqYdphwY5bNAIdqsX+Q0icH88TjpW61gNML5uLu+xhabkuqw= =wyOl -----END PGP SIGNATURE----- Merge tag 'iommu-fixes-v5.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu fixes from Joerg Roedel: - three fixes for Intel VT-d to fix a potential dead-lock, a formatting fix and a bit setting fix - one fix for the ARM-SMMU to make it work on some platforms with sub-optimal SMMU emulation * tag 'iommu-fixes-v5.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: iommu/arm-smmu: Avoid constant zero in TLBI writes iommu/vt-d: Set the right field for Page Walk Snoop iommu/vt-d: Fix lock inversion between iommu->lock and device_domain_lock iommu: Add missing new line for dma type
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commit
c78ad1be4b
@ -47,6 +47,15 @@
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#include "arm-smmu-regs.h"
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/*
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* Apparently, some Qualcomm arm64 platforms which appear to expose their SMMU
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* global register space are still, in fact, using a hypervisor to mediate it
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* by trapping and emulating register accesses. Sadly, some deployed versions
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* of said trapping code have bugs wherein they go horribly wrong for stores
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* using r31 (i.e. XZR/WZR) as the source register.
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*/
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#define QCOM_DUMMY_VAL -1
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#define ARM_MMU500_ACTLR_CPRE (1 << 1)
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#define ARM_MMU500_ACR_CACHE_LOCK (1 << 26)
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@ -411,7 +420,7 @@ static void __arm_smmu_tlb_sync(struct arm_smmu_device *smmu,
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{
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unsigned int spin_cnt, delay;
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writel_relaxed(0, sync);
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writel_relaxed(QCOM_DUMMY_VAL, sync);
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for (delay = 1; delay < TLB_LOOP_TIMEOUT; delay *= 2) {
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for (spin_cnt = TLB_SPIN_COUNT; spin_cnt > 0; spin_cnt--) {
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if (!(readl_relaxed(status) & sTLBGSTATUS_GSACTIVE))
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@ -1751,8 +1760,8 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu)
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}
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/* Invalidate the TLB, just in case */
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writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLH);
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writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLNSNH);
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writel_relaxed(QCOM_DUMMY_VAL, gr0_base + ARM_SMMU_GR0_TLBIALLH);
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writel_relaxed(QCOM_DUMMY_VAL, gr0_base + ARM_SMMU_GR0_TLBIALLNSNH);
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reg = readl_relaxed(ARM_SMMU_GR0_NS(smmu) + ARM_SMMU_GR0_sCR0);
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@ -2504,6 +2504,7 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu,
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}
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}
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spin_lock(&iommu->lock);
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spin_lock_irqsave(&device_domain_lock, flags);
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if (dev)
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found = find_domain(dev);
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@ -2519,17 +2520,16 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu,
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if (found) {
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spin_unlock_irqrestore(&device_domain_lock, flags);
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spin_unlock(&iommu->lock);
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free_devinfo_mem(info);
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/* Caller must free the original domain */
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return found;
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}
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spin_lock(&iommu->lock);
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ret = domain_attach_iommu(domain, iommu);
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spin_unlock(&iommu->lock);
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if (ret) {
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spin_unlock_irqrestore(&device_domain_lock, flags);
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spin_unlock(&iommu->lock);
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free_devinfo_mem(info);
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return NULL;
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}
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@ -2539,6 +2539,7 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu,
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if (dev)
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dev->archdata.iommu = info;
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spin_unlock_irqrestore(&device_domain_lock, flags);
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spin_unlock(&iommu->lock);
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/* PASID table is mandatory for a PCI device in scalable mode. */
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if (dev && dev_is_pci(dev) && sm_supported(iommu)) {
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@ -389,7 +389,7 @@ static inline void pasid_set_present(struct pasid_entry *pe)
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*/
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static inline void pasid_set_page_snoop(struct pasid_entry *pe, bool value)
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{
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pasid_set_bits(&pe->val[1], 1 << 23, value);
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pasid_set_bits(&pe->val[1], 1 << 23, value << 23);
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}
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/*
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@ -329,7 +329,7 @@ static ssize_t iommu_group_show_type(struct iommu_group *group,
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type = "unmanaged\n";
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break;
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case IOMMU_DOMAIN_DMA:
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type = "DMA";
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type = "DMA\n";
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break;
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}
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}
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