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perf vendor events intel: Update cascadelakex TMA metrics to 4.7
Top-Down Microarchitecture Analysis (TMA) metrics simplify cycle-accounting using microarchitecture-abstracted metrics organized in one hierarchy. This update is from version 4.5 to 4.7. The update includes: - tma_info_bottleneck* metrics, an abstraction or summarization of the 100+ TMA tree nodes into 12-entry familiar performance metrics. - Reduce number of events (multiplexing) for tma_info_system_gflops, tma_info_core_flopc, tma_info_inst_mix_ipflop and tma_ports_utilized_0. - Fixes for tma_info_bottleneck_mispredictions and tma_info_bad_spec_branch_misprediction_cost. - New tma_info_inst_mix_ippause metric. - tma_serializing_operation is raised to level 3. - Swapped tma_info_core_ilp (becomes per SMT thread) and tma_info_pipeline_execute (per physical core). - tma_nop_instructions and tma_shuffles_256b are lowered to level 4 under tma_other_light_ops_group. - Reduced number of events when SMT is off. - Tuned thresholds for tma_info_bottleneck_branching_overhead, tma_fetch_bandwidth and tma_ports_utilized_3m. The update came from: https://github.com/intel/perfmon/pull/140 https://github.com/intel/perfmon/pull/138 Running the script: https://github.com/intel/perfmon/blob/main/scripts/create_perf_json.py Signed-off-by: Ian Rogers <irogers@google.com> Reviewed-by: Kan Liang <kan.liang@linux.intel.com> Cc: Stephane Eranian <eranian@google.com> Cc: Caleb Biggers <caleb.biggers@intel.com> Cc: Edward Baker <edward.baker@intel.com> Cc: Perry Taylor <perry.taylor@intel.com> Cc: Samantha Alt <samantha.alt@intel.com> Cc: Weilin Wang <weilin.wang@intel.com> Signed-off-by: Namhyung Kim <namhyung@kernel.org> Link: https://lore.kernel.org/r/20240214011820.644458-18-irogers@google.com
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"Backend": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"Bad": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"BadSpec": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"BigFoot": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"BigFootprint": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"BrMispredicts": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"Branches": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"CacheMisses": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"CacheHits": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"CodeGen": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"Compute": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"Cor": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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@ -26,7 +26,9 @@
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"L2Evicts": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"LSD": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"MachineClears": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"Machine_Clears": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"Mem": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"MemOffcore": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"MemoryBW": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"MemoryBound": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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"MemoryLat": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
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@ -64,8 +66,10 @@
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"tma_L5_group": "Metrics for top-down breakdown at level 5",
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"tma_L6_group": "Metrics for top-down breakdown at level 6",
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"tma_alu_op_utilization_group": "Metrics contributing to tma_alu_op_utilization category",
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"tma_assists_group": "Metrics contributing to tma_assists category",
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"tma_backend_bound_group": "Metrics contributing to tma_backend_bound category",
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"tma_bad_speculation_group": "Metrics contributing to tma_bad_speculation category",
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"tma_branch_mispredicts_group": "Metrics contributing to tma_branch_mispredicts category",
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"tma_branch_resteers_group": "Metrics contributing to tma_branch_resteers category",
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"tma_core_bound_group": "Metrics contributing to tma_core_bound category",
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"tma_dram_bound_group": "Metrics contributing to tma_dram_bound category",
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@ -78,9 +82,9 @@
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"tma_frontend_bound_group": "Metrics contributing to tma_frontend_bound category",
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"tma_heavy_operations_group": "Metrics contributing to tma_heavy_operations category",
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"tma_issue2P": "Metrics related by the issue $issue2P",
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"tma_issueBC": "Metrics related by the issue $issueBC",
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"tma_issueBM": "Metrics related by the issue $issueBM",
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"tma_issueBW": "Metrics related by the issue $issueBW",
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"tma_issueComp": "Metrics related by the issue $issueComp",
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"tma_issueD0": "Metrics related by the issue $issueD0",
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"tma_issueFB": "Metrics related by the issue $issueFB",
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"tma_issueFL": "Metrics related by the issue $issueFL",
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@ -100,10 +104,12 @@
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"tma_l3_bound_group": "Metrics contributing to tma_l3_bound category",
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"tma_light_operations_group": "Metrics contributing to tma_light_operations category",
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"tma_load_op_utilization_group": "Metrics contributing to tma_load_op_utilization category",
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"tma_machine_clears_group": "Metrics contributing to tma_machine_clears category",
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"tma_mem_latency_group": "Metrics contributing to tma_mem_latency category",
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"tma_memory_bound_group": "Metrics contributing to tma_memory_bound category",
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"tma_microcode_sequencer_group": "Metrics contributing to tma_microcode_sequencer category",
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"tma_mite_group": "Metrics contributing to tma_mite category",
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"tma_other_light_ops_group": "Metrics contributing to tma_other_light_ops category",
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"tma_ports_utilization_group": "Metrics contributing to tma_ports_utilization category",
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"tma_ports_utilized_0_group": "Metrics contributing to tma_ports_utilized_0 category",
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"tma_ports_utilized_3m_group": "Metrics contributing to tma_ports_utilized_3m category",
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