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Merge remote-tracking branches 'spi/topic/s3c64xx', 'spi/topic/ti-qspi' and 'spi/topic/txx9' into spi-next
This commit is contained in:
Mark Brown
commit
c70efb8515
@ -32,6 +32,7 @@
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#define MAX_SPI_PORTS 6
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#define S3C64XX_SPI_QUIRK_POLL (1 << 0)
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#define S3C64XX_SPI_QUIRK_CS_AUTO (1 << 1)
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#define AUTOSUSPEND_TIMEOUT 2000
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/* Registers and bit-fields */
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@ -682,7 +683,7 @@ static int s3c64xx_spi_transfer_one(struct spi_master *master,
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/* Only BPW and Speed may change across transfers */
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bpw = xfer->bits_per_word;
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speed = xfer->speed_hz ? : spi->max_speed_hz;
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speed = xfer->speed_hz;
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if (bpw != sdd->cur_bpw || speed != sdd->cur_speed) {
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sdd->cur_bpw = bpw;
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@ -859,13 +860,15 @@ static int s3c64xx_spi_setup(struct spi_device *spi)
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}
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}
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pm_runtime_put(&sdd->pdev->dev);
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pm_runtime_mark_last_busy(&sdd->pdev->dev);
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pm_runtime_put_autosuspend(&sdd->pdev->dev);
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if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO))
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writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
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return 0;
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setup_exit:
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pm_runtime_put(&sdd->pdev->dev);
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pm_runtime_mark_last_busy(&sdd->pdev->dev);
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pm_runtime_put_autosuspend(&sdd->pdev->dev);
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/* setup() returns with device de-selected */
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if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO))
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writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
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@ -1162,6 +1165,12 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
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goto err2;
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}
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pm_runtime_set_autosuspend_delay(&pdev->dev, AUTOSUSPEND_TIMEOUT);
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pm_runtime_use_autosuspend(&pdev->dev);
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pm_runtime_set_active(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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pm_runtime_get_sync(&pdev->dev);
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/* Setup Deufult Mode */
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s3c64xx_spi_hwinit(sdd, sdd->port_id);
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@ -1180,9 +1189,6 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
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S3C64XX_SPI_INT_TX_OVERRUN_EN | S3C64XX_SPI_INT_TX_UNDERRUN_EN,
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sdd->regs + S3C64XX_SPI_INT_EN);
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pm_runtime_set_active(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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ret = devm_spi_register_master(&pdev->dev, master);
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if (ret != 0) {
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dev_err(&pdev->dev, "cannot register SPI master: %d\n", ret);
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@ -1195,9 +1201,16 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
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mem_res, (FIFO_LVL_MASK(sdd) >> 1) + 1,
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sdd->rx_dma.dmach, sdd->tx_dma.dmach);
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pm_runtime_mark_last_busy(&pdev->dev);
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pm_runtime_put_autosuspend(&pdev->dev);
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return 0;
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err3:
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pm_runtime_put_noidle(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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pm_runtime_set_suspended(&pdev->dev);
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clk_disable_unprepare(sdd->src_clk);
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err2:
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clk_disable_unprepare(sdd->clk);
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@ -1212,7 +1225,7 @@ static int s3c64xx_spi_remove(struct platform_device *pdev)
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struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));
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struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
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pm_runtime_disable(&pdev->dev);
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pm_runtime_get_sync(&pdev->dev);
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writel(0, sdd->regs + S3C64XX_SPI_INT_EN);
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@ -1220,6 +1233,10 @@ static int s3c64xx_spi_remove(struct platform_device *pdev)
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clk_disable_unprepare(sdd->clk);
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pm_runtime_put_noidle(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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pm_runtime_set_suspended(&pdev->dev);
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return 0;
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}
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@ -1233,10 +1250,9 @@ static int s3c64xx_spi_suspend(struct device *dev)
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if (ret)
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return ret;
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if (!pm_runtime_suspended(dev)) {
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clk_disable_unprepare(sdd->clk);
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clk_disable_unprepare(sdd->src_clk);
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}
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ret = pm_runtime_force_suspend(dev);
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if (ret < 0)
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return ret;
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sdd->cur_speed = 0; /* Output Clock is stopped */
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@ -1248,14 +1264,14 @@ static int s3c64xx_spi_resume(struct device *dev)
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struct spi_master *master = dev_get_drvdata(dev);
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struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
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struct s3c64xx_spi_info *sci = sdd->cntrlr_info;
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int ret;
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if (sci->cfg_gpio)
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sci->cfg_gpio();
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if (!pm_runtime_suspended(dev)) {
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clk_prepare_enable(sdd->src_clk);
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clk_prepare_enable(sdd->clk);
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}
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ret = pm_runtime_force_resume(dev);
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if (ret < 0)
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return ret;
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s3c64xx_spi_hwinit(sdd, sdd->port_id);
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@ -39,8 +39,6 @@ struct ti_qspi_regs {
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};
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struct ti_qspi {
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struct completion transfer_complete;
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/* list synchronization */
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struct mutex list_lock;
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@ -62,10 +60,6 @@ struct ti_qspi {
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#define QSPI_PID (0x0)
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#define QSPI_SYSCONFIG (0x10)
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#define QSPI_INTR_STATUS_RAW_SET (0x20)
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#define QSPI_INTR_STATUS_ENABLED_CLEAR (0x24)
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#define QSPI_INTR_ENABLE_SET_REG (0x28)
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#define QSPI_INTR_ENABLE_CLEAR_REG (0x2c)
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#define QSPI_SPI_CLOCK_CNTRL_REG (0x40)
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#define QSPI_SPI_DC_REG (0x44)
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#define QSPI_SPI_CMD_REG (0x48)
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@ -97,7 +91,6 @@ struct ti_qspi {
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#define QSPI_RD_DUAL (3 << 16)
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#define QSPI_RD_QUAD (7 << 16)
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#define QSPI_INVAL (4 << 16)
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#define QSPI_WC_CMD_INT_EN (1 << 14)
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#define QSPI_FLEN(n) ((n - 1) << 0)
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#define QSPI_WLEN_MAX_BITS 128
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#define QSPI_WLEN_MAX_BYTES 16
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@ -106,10 +99,6 @@ struct ti_qspi {
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#define BUSY 0x01
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#define WC 0x02
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/* INTERRUPT REGISTER */
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#define QSPI_WC_INT_EN (1 << 1)
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#define QSPI_WC_INT_DISABLE (1 << 1)
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/* Device Control */
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#define QSPI_DD(m, n) (m << (3 + n * 8))
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#define QSPI_CKPHA(n) (1 << (2 + n * 8))
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@ -217,6 +206,24 @@ static inline u32 qspi_is_busy(struct ti_qspi *qspi)
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return stat & BUSY;
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}
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static inline int ti_qspi_poll_wc(struct ti_qspi *qspi)
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{
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u32 stat;
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unsigned long timeout = jiffies + QSPI_COMPLETION_TIMEOUT;
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do {
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stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);
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if (stat & WC)
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return 0;
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cpu_relax();
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} while (time_after(timeout, jiffies));
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stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);
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if (stat & WC)
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return 0;
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return -ETIMEDOUT;
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}
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static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t)
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{
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int wlen, count, xfer_len;
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@ -275,8 +282,7 @@ static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t)
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}
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ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG);
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if (!wait_for_completion_timeout(&qspi->transfer_complete,
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QSPI_COMPLETION_TIMEOUT)) {
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if (ti_qspi_poll_wc(qspi)) {
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dev_err(qspi->dev, "write timed out\n");
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return -ETIMEDOUT;
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}
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@ -315,8 +321,7 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t)
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return -EBUSY;
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ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG);
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if (!wait_for_completion_timeout(&qspi->transfer_complete,
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QSPI_COMPLETION_TIMEOUT)) {
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if (ti_qspi_poll_wc(qspi)) {
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dev_err(qspi->dev, "read timed out\n");
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return -ETIMEDOUT;
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}
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@ -388,9 +393,7 @@ static int ti_qspi_start_transfer_one(struct spi_master *master,
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qspi->cmd = 0;
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qspi->cmd |= QSPI_EN_CS(spi->chip_select);
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qspi->cmd |= QSPI_FLEN(frame_length);
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qspi->cmd |= QSPI_WC_CMD_INT_EN;
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ti_qspi_write(qspi, QSPI_WC_INT_EN, QSPI_INTR_ENABLE_SET_REG);
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ti_qspi_write(qspi, qspi->dc, QSPI_SPI_DC_REG);
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mutex_lock(&qspi->list_lock);
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@ -417,31 +420,6 @@ static int ti_qspi_start_transfer_one(struct spi_master *master,
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return status;
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}
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static irqreturn_t ti_qspi_isr(int irq, void *dev_id)
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{
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struct ti_qspi *qspi = dev_id;
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u16 int_stat;
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u32 stat;
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irqreturn_t ret = IRQ_HANDLED;
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int_stat = ti_qspi_read(qspi, QSPI_INTR_STATUS_ENABLED_CLEAR);
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stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);
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if (!int_stat) {
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dev_dbg(qspi->dev, "No IRQ triggered\n");
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ret = IRQ_NONE;
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goto out;
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}
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ti_qspi_write(qspi, QSPI_WC_INT_DISABLE,
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QSPI_INTR_STATUS_ENABLED_CLEAR);
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if (stat & WC)
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complete(&qspi->transfer_complete);
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out:
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return ret;
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}
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static int ti_qspi_runtime_resume(struct device *dev)
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{
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struct ti_qspi *qspi;
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@ -550,22 +528,12 @@ static int ti_qspi_probe(struct platform_device *pdev)
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}
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}
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ret = devm_request_irq(&pdev->dev, irq, ti_qspi_isr, 0,
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dev_name(&pdev->dev), qspi);
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if (ret < 0) {
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dev_err(&pdev->dev, "Failed to register ISR for IRQ %d\n",
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irq);
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goto free_master;
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}
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qspi->fclk = devm_clk_get(&pdev->dev, "fck");
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if (IS_ERR(qspi->fclk)) {
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ret = PTR_ERR(qspi->fclk);
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dev_err(&pdev->dev, "could not get clk: %d\n", ret);
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}
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init_completion(&qspi->transfer_complete);
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pm_runtime_use_autosuspend(&pdev->dev);
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pm_runtime_set_autosuspend_delay(&pdev->dev, QSPI_AUTOSUSPEND_TIMEOUT);
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pm_runtime_enable(&pdev->dev);
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@ -586,18 +554,7 @@ free_master:
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static int ti_qspi_remove(struct platform_device *pdev)
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{
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struct ti_qspi *qspi = platform_get_drvdata(pdev);
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int ret;
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ret = pm_runtime_get_sync(qspi->dev);
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if (ret < 0) {
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dev_err(qspi->dev, "pm_runtime_get_sync() failed\n");
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return ret;
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}
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ti_qspi_write(qspi, QSPI_WC_INT_DISABLE, QSPI_INTR_ENABLE_CLEAR_REG);
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pm_runtime_put(qspi->dev);
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pm_runtime_put_sync(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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return 0;
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@ -181,7 +181,7 @@ static void txx9spi_work_one(struct txx9spi *c, struct spi_message *m)
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u32 data;
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unsigned int len = t->len;
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unsigned int wsize;
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u32 speed_hz = t->speed_hz ? : spi->max_speed_hz;
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u32 speed_hz = t->speed_hz;
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u8 bits_per_word = t->bits_per_word;
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wsize = bits_per_word >> 3; /* in bytes */
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