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iio: potentiometer: mcp41010: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes: 092cb71a60
("iio: potentiometer: Add driver for Microchip MCP41xxx/42xxx")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-84-jic23@kernel.org
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@ -60,7 +60,7 @@ struct mcp41010_data {
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const struct mcp41010_cfg *cfg;
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const struct mcp41010_cfg *cfg;
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struct mutex lock; /* Protect write sequences */
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struct mutex lock; /* Protect write sequences */
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unsigned int value[MCP41010_MAX_WIPERS]; /* Cache wiper values */
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unsigned int value[MCP41010_MAX_WIPERS]; /* Cache wiper values */
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u8 buf[2] ____cacheline_aligned;
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u8 buf[2] __aligned(IIO_DMA_MINALIGN);
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};
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};
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#define MCP41010_CHANNEL(ch) { \
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#define MCP41010_CHANNEL(ch) { \
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