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topology: Represent clusters of CPUs within a die
Both ACPI and DT provide the ability to describe additional layers of topology between that of individual cores and higher level constructs such as the level at which the last level cache is shared. In ACPI this can be represented in PPTT as a Processor Hierarchy Node Structure [1] that is the parent of the CPU cores and in turn has a parent Processor Hierarchy Nodes Structure representing a higher level of topology. For example Kunpeng 920 has 6 or 8 clusters in each NUMA node, and each cluster has 4 cpus. All clusters share L3 cache data, but each cluster has local L3 tag. On the other hand, each clusters will share some internal system bus. +-----------------------------------+ +---------+ | +------+ +------+ +--------------------------+ | | | CPU0 | | cpu1 | | +-----------+ | | | +------+ +------+ | | | | | | +----+ L3 | | | | +------+ +------+ cluster | | tag | | | | | CPU2 | | CPU3 | | | | | | | +------+ +------+ | +-----------+ | | | | | | +-----------------------------------+ | | +-----------------------------------+ | | | +------+ +------+ +--------------------------+ | | | | | | | +-----------+ | | | +------+ +------+ | | | | | | | | L3 | | | | +------+ +------+ +----+ tag | | | | | | | | | | | | | | +------+ +------+ | +-----------+ | | | | | | +-----------------------------------+ | L3 | | data | +-----------------------------------+ | | | +------+ +------+ | +-----------+ | | | | | | | | | | | | | +------+ +------+ +----+ L3 | | | | | | tag | | | | +------+ +------+ | | | | | | | | | | | +-----------+ | | | +------+ +------+ +--------------------------+ | +-----------------------------------| | | +-----------------------------------| | | | +------+ +------+ +--------------------------+ | | | | | | | +-----------+ | | | +------+ +------+ | | | | | | +----+ L3 | | | | +------+ +------+ | | tag | | | | | | | | | | | | | | +------+ +------+ | +-----------+ | | | | | | +-----------------------------------+ | | +-----------------------------------+ | | | +------+ +------+ +--------------------------+ | | | | | | | +-----------+ | | | +------+ +------+ | | | | | | | | L3 | | | | +------+ +------+ +---+ tag | | | | | | | | | | | | | | +------+ +------+ | +-----------+ | | | | | | +-----------------------------------+ | | +-----------------------------------+ | | | +------+ +------+ +--------------------------+ | | | | | | | +-----------+ | | | +------+ +------+ | | | | | | | | L3 | | | | +------+ +------+ +--+ tag | | | | | | | | | | | | | | +------+ +------+ | +-----------+ | | | | +---------+ +-----------------------------------+ That means spreading tasks among clusters will bring more bandwidth while packing tasks within one cluster will lead to smaller cache synchronization latency. So both kernel and userspace will have a chance to leverage this topology to deploy tasks accordingly to achieve either smaller cache latency within one cluster or an even distribution of load among clusters for higher throughput. This patch exposes cluster topology to both kernel and userspace. Libraried like hwloc will know cluster by cluster_cpus and related sysfs attributes. PoC of HWLOC support at [2]. Note this patch only handle the ACPI case. Special consideration is needed for SMT processors, where it is necessary to move 2 levels up the hierarchy from the leaf nodes (thus skipping the processor core level). Note that arm64 / ACPI does not provide any means of identifying a die level in the topology but that may be unrelate to the cluster level. [1] ACPI Specification 6.3 - section 5.2.29.1 processor hierarchy node structure (Type 0) [2] https://github.com/hisilicon/hwloc/tree/linux-cluster Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Signed-off-by: Barry Song <song.bao.hua@hisilicon.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20210924085104.44806-2-21cnbao@gmail.com
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@ -42,6 +42,12 @@ Description: the CPU core ID of cpuX. Typically it is the hardware platform's
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architecture and platform dependent.
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Values: integer
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What: /sys/devices/system/cpu/cpuX/topology/cluster_id
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Description: the cluster ID of cpuX. Typically it is the hardware platform's
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identifier (rather than the kernel's). The actual value is
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architecture and platform dependent.
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Values: integer
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What: /sys/devices/system/cpu/cpuX/topology/book_id
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Description: the book ID of cpuX. Typically it is the hardware platform's
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identifier (rather than the kernel's). The actual value is
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@ -85,6 +91,15 @@ Description: human-readable list of CPUs within the same die.
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The format is like 0-3, 8-11, 14,17.
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Values: decimal list.
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What: /sys/devices/system/cpu/cpuX/topology/cluster_cpus
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Description: internal kernel map of CPUs within the same cluster.
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Values: hexadecimal bitmask.
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What: /sys/devices/system/cpu/cpuX/topology/cluster_cpus_list
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Description: human-readable list of CPUs within the same cluster.
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The format is like 0-3, 8-11, 14,17.
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Values: decimal list.
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What: /sys/devices/system/cpu/cpuX/topology/book_siblings
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Description: internal kernel map of cpuX's hardware threads within the same
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book_id. it's only used on s390.
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@ -19,11 +19,13 @@ these macros in include/asm-XXX/topology.h::
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#define topology_physical_package_id(cpu)
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#define topology_die_id(cpu)
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#define topology_cluster_id(cpu)
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#define topology_core_id(cpu)
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#define topology_book_id(cpu)
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#define topology_drawer_id(cpu)
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#define topology_sibling_cpumask(cpu)
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#define topology_core_cpumask(cpu)
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#define topology_cluster_cpumask(cpu)
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#define topology_die_cpumask(cpu)
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#define topology_book_cpumask(cpu)
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#define topology_drawer_cpumask(cpu)
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@ -39,10 +41,12 @@ not defined by include/asm-XXX/topology.h:
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1) topology_physical_package_id: -1
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2) topology_die_id: -1
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3) topology_core_id: 0
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4) topology_sibling_cpumask: just the given CPU
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5) topology_core_cpumask: just the given CPU
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6) topology_die_cpumask: just the given CPU
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3) topology_cluster_id: -1
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4) topology_core_id: 0
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5) topology_sibling_cpumask: just the given CPU
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6) topology_core_cpumask: just the given CPU
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7) topology_cluster_cpumask: just the given CPU
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8) topology_die_cpumask: just the given CPU
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For architectures that don't support books (CONFIG_SCHED_BOOK) there are no
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default definitions for topology_book_id() and topology_book_cpumask().
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@ -103,6 +103,8 @@ int __init parse_acpi_topology(void)
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cpu_topology[cpu].thread_id = -1;
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cpu_topology[cpu].core_id = topology_id;
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}
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topology_id = find_acpi_cpu_topology_cluster(cpu);
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cpu_topology[cpu].cluster_id = topology_id;
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topology_id = find_acpi_cpu_topology_package(cpu);
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cpu_topology[cpu].package_id = topology_id;
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@ -746,6 +746,73 @@ int find_acpi_cpu_topology_package(unsigned int cpu)
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ACPI_PPTT_PHYSICAL_PACKAGE);
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}
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/**
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* find_acpi_cpu_topology_cluster() - Determine a unique CPU cluster value
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* @cpu: Kernel logical CPU number
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*
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* Determine a topology unique cluster ID for the given CPU/thread.
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* This ID can then be used to group peers, which will have matching ids.
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*
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* The cluster, if present is the level of topology above CPUs. In a
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* multi-thread CPU, it will be the level above the CPU, not the thread.
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* It may not exist in single CPU systems. In simple multi-CPU systems,
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* it may be equal to the package topology level.
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*
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* Return: -ENOENT if the PPTT doesn't exist, the CPU cannot be found
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* or there is no toplogy level above the CPU..
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* Otherwise returns a value which represents the package for this CPU.
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*/
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int find_acpi_cpu_topology_cluster(unsigned int cpu)
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{
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struct acpi_table_header *table;
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acpi_status status;
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struct acpi_pptt_processor *cpu_node, *cluster_node;
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u32 acpi_cpu_id;
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int retval;
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int is_thread;
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status = acpi_get_table(ACPI_SIG_PPTT, 0, &table);
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if (ACPI_FAILURE(status)) {
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acpi_pptt_warn_missing();
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return -ENOENT;
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}
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acpi_cpu_id = get_acpi_id_for_cpu(cpu);
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cpu_node = acpi_find_processor_node(table, acpi_cpu_id);
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if (cpu_node == NULL || !cpu_node->parent) {
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retval = -ENOENT;
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goto put_table;
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}
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is_thread = cpu_node->flags & ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD;
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cluster_node = fetch_pptt_node(table, cpu_node->parent);
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if (cluster_node == NULL) {
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retval = -ENOENT;
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goto put_table;
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}
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if (is_thread) {
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if (!cluster_node->parent) {
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retval = -ENOENT;
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goto put_table;
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}
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cluster_node = fetch_pptt_node(table, cluster_node->parent);
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if (cluster_node == NULL) {
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retval = -ENOENT;
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goto put_table;
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}
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}
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if (cluster_node->flags & ACPI_PPTT_ACPI_PROCESSOR_ID_VALID)
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retval = cluster_node->acpi_processor_id;
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else
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retval = ACPI_PTR_DIFF(cluster_node, table);
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put_table:
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acpi_put_table(table);
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return retval;
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}
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/**
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* find_acpi_cpu_topology_hetero_id() - Get a core architecture tag
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* @cpu: Kernel logical CPU number
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@ -600,6 +600,11 @@ const struct cpumask *cpu_coregroup_mask(int cpu)
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return core_mask;
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}
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const struct cpumask *cpu_clustergroup_mask(int cpu)
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{
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return &cpu_topology[cpu].cluster_sibling;
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}
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void update_siblings_masks(unsigned int cpuid)
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{
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struct cpu_topology *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
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@ -617,6 +622,12 @@ void update_siblings_masks(unsigned int cpuid)
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if (cpuid_topo->package_id != cpu_topo->package_id)
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continue;
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if (cpuid_topo->cluster_id == cpu_topo->cluster_id &&
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cpuid_topo->cluster_id != -1) {
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cpumask_set_cpu(cpu, &cpuid_topo->cluster_sibling);
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cpumask_set_cpu(cpuid, &cpu_topo->cluster_sibling);
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}
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cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
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cpumask_set_cpu(cpu, &cpuid_topo->core_sibling);
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@ -635,6 +646,9 @@ static void clear_cpu_topology(int cpu)
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cpumask_clear(&cpu_topo->llc_sibling);
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cpumask_set_cpu(cpu, &cpu_topo->llc_sibling);
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cpumask_clear(&cpu_topo->cluster_sibling);
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cpumask_set_cpu(cpu, &cpu_topo->cluster_sibling);
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cpumask_clear(&cpu_topo->core_sibling);
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cpumask_set_cpu(cpu, &cpu_topo->core_sibling);
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cpumask_clear(&cpu_topo->thread_sibling);
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@ -650,6 +664,7 @@ void __init reset_cpu_topology(void)
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cpu_topo->thread_id = -1;
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cpu_topo->core_id = -1;
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cpu_topo->cluster_id = -1;
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cpu_topo->package_id = -1;
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cpu_topo->llc_id = -1;
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@ -48,6 +48,9 @@ static DEVICE_ATTR_RO(physical_package_id);
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define_id_show_func(die_id);
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static DEVICE_ATTR_RO(die_id);
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define_id_show_func(cluster_id);
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static DEVICE_ATTR_RO(cluster_id);
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define_id_show_func(core_id);
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static DEVICE_ATTR_RO(core_id);
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@ -63,6 +66,10 @@ define_siblings_read_func(core_siblings, core_cpumask);
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static BIN_ATTR_RO(core_siblings, 0);
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static BIN_ATTR_RO(core_siblings_list, 0);
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define_siblings_read_func(cluster_cpus, cluster_cpumask);
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static BIN_ATTR_RO(cluster_cpus, 0);
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static BIN_ATTR_RO(cluster_cpus_list, 0);
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define_siblings_read_func(die_cpus, die_cpumask);
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static BIN_ATTR_RO(die_cpus, 0);
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static BIN_ATTR_RO(die_cpus_list, 0);
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@ -94,6 +101,8 @@ static struct bin_attribute *bin_attrs[] = {
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&bin_attr_thread_siblings_list,
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&bin_attr_core_siblings,
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&bin_attr_core_siblings_list,
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&bin_attr_cluster_cpus,
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&bin_attr_cluster_cpus_list,
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&bin_attr_die_cpus,
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&bin_attr_die_cpus_list,
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&bin_attr_package_cpus,
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@ -112,6 +121,7 @@ static struct bin_attribute *bin_attrs[] = {
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static struct attribute *default_attrs[] = {
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&dev_attr_physical_package_id.attr,
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&dev_attr_die_id.attr,
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&dev_attr_cluster_id.attr,
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&dev_attr_core_id.attr,
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#ifdef CONFIG_SCHED_BOOK
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&dev_attr_book_id.attr,
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#ifdef CONFIG_ACPI_PPTT
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int acpi_pptt_cpu_is_thread(unsigned int cpu);
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int find_acpi_cpu_topology(unsigned int cpu, int level);
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int find_acpi_cpu_topology_cluster(unsigned int cpu);
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int find_acpi_cpu_topology_package(unsigned int cpu);
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int find_acpi_cpu_topology_hetero_id(unsigned int cpu);
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int find_acpi_cpu_cache_topology(unsigned int cpu, int level);
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@ -1365,6 +1366,10 @@ static inline int find_acpi_cpu_topology(unsigned int cpu, int level)
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{
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return -EINVAL;
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}
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static inline int find_acpi_cpu_topology_cluster(unsigned int cpu)
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{
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return -EINVAL;
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}
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static inline int find_acpi_cpu_topology_package(unsigned int cpu)
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{
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return -EINVAL;
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struct cpu_topology {
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int thread_id;
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int core_id;
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int cluster_id;
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int package_id;
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int llc_id;
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cpumask_t thread_sibling;
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cpumask_t core_sibling;
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cpumask_t cluster_sibling;
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cpumask_t llc_sibling;
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};
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@ -73,13 +75,16 @@ struct cpu_topology {
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extern struct cpu_topology cpu_topology[NR_CPUS];
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#define topology_physical_package_id(cpu) (cpu_topology[cpu].package_id)
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#define topology_cluster_id(cpu) (cpu_topology[cpu].cluster_id)
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#define topology_core_id(cpu) (cpu_topology[cpu].core_id)
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#define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_sibling)
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#define topology_sibling_cpumask(cpu) (&cpu_topology[cpu].thread_sibling)
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#define topology_cluster_cpumask(cpu) (&cpu_topology[cpu].cluster_sibling)
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#define topology_llc_cpumask(cpu) (&cpu_topology[cpu].llc_sibling)
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void init_cpu_topology(void);
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void store_cpu_topology(unsigned int cpuid);
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const struct cpumask *cpu_coregroup_mask(int cpu);
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const struct cpumask *cpu_clustergroup_mask(int cpu);
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void update_siblings_masks(unsigned int cpu);
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void remove_cpu_topology(unsigned int cpuid);
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void reset_cpu_topology(void);
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#ifndef topology_die_id
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#define topology_die_id(cpu) ((void)(cpu), -1)
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#endif
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#ifndef topology_cluster_id
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#define topology_cluster_id(cpu) ((void)(cpu), -1)
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#endif
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#ifndef topology_core_id
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#define topology_core_id(cpu) ((void)(cpu), 0)
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#endif
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@ -195,6 +198,9 @@ static inline int cpu_to_mem(int cpu)
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#ifndef topology_core_cpumask
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#define topology_core_cpumask(cpu) cpumask_of(cpu)
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#endif
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#ifndef topology_cluster_cpumask
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#define topology_cluster_cpumask(cpu) cpumask_of(cpu)
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#endif
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#ifndef topology_die_cpumask
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#define topology_die_cpumask(cpu) cpumask_of(cpu)
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#endif
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