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dt-bindings: adapt rockchip-pinctrl doc to changed bindings
Introduce the syscons for grf and pmu and deprecate the previous register areas. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Max Schwarz <max.schwarz@online.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -21,15 +21,23 @@ defined as gpio sub-nodes of the pinmux controller.
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Required properties for iomux controller:
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- compatible: one of "rockchip,rk2928-pinctrl", "rockchip,rk3066a-pinctrl"
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"rockchip,rk3066b-pinctrl", "rockchip,rk3188-pinctrl"
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- rockchip,grf: phandle referencing a syscon providing the
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"general register files"
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Optional properties for iomux controller:
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- rockchip,pmu: phandle referencing a syscon providing the pmu registers
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as some SoCs carry parts of the iomux controller registers there.
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Required for at least rk3188 and rk3288.
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Deprecated properties for iomux controller:
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- reg: first element is the general register space of the iomux controller
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It should be large enough to contain also separate pull registers.
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Deprecated:
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second element is the separate pull register space of the rk3188
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second element is the separate pull register space of the rk3188.
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Use rockchip,grf and rockchip,pmu described above instead.
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Required properties for gpio sub nodes:
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- compatible: "rockchip,gpio-bank", "rockchip,rk3188-gpio-bank0"
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- reg: register of the gpio bank (different than the iomux registerset)
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second element: separate pull register for rk3188 bank0
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- interrupts: base interrupt of the gpio bank in the interrupt controller
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- clocks: clock that drives this bank
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- gpio-controller: identifies the node as a gpio controller and pin bank.
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@ -41,6 +49,10 @@ Required properties for gpio sub nodes:
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cells should use the standard two-cell scheme described in
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bindings/interrupt-controller/interrupts.txt
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Deprecated properties for gpio sub nodes:
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- reg: second element: separate pull register for rk3188 bank0, use
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rockchip,pmu described above instead
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Required properties for pin configuration node:
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- rockchip,pins: 3 integers array, represents a group of pins mux and config
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setting. The format is rockchip,pins = <PIN_BANK PIN_BANK_IDX MUX &phandle>.
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@ -56,7 +68,8 @@ Examples:
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pinctrl@20008000 {
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compatible = "rockchip,rk3066a-pinctrl";
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reg = <0x20008000 0x150>;
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rockchip,grf = <&grf>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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@ -105,16 +118,15 @@ Example for rk3188:
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pinctrl@20008000 {
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compatible = "rockchip,rk3188-pinctrl";
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reg = <0x20008000 0xa0>,
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<0x20008164 0x1a0>;
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rockchip,grf = <&grf>;
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rockchip,pmu = <&pmu>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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gpio0: gpio0@0x2000a000 {
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compatible = "rockchip,rk3188-gpio-bank0";
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reg = <0x2000a000 0x100>,
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<0x20004064 0x8>;
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reg = <0x2000a000 0x100>;
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interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_gates8 9>;
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