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tty: serial: fsl_lpuart: disable the CTS when send break signal
LPUART IP has a bug that it treats the CTS as higher priority than the break signal, which cause the break signal sending through UARTCTRL_SBK may impacted by the CTS input if the HW flow control is enabled. Add this workaround patch to fix the IP bug, we can disable CTS before asserting SBK to avoid any interference from CTS, and re-enable it when break off. Such as for the bluetooth chip power save feature, host can let the BT chip get into sleep state by sending a UART break signal, and wake it up by turning off the UART break. If the BT chip enters the sleep mode successfully, it will pull up the CTS line, if the BT chip is woken up, it will pull down the CTS line. If without this workaround patch, the UART TX pin cannot send the break signal successfully as it affected by the BT CTS pin. After adding this patch, the BT power save feature can work well. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Link: https://lore.kernel.org/r/20221214031137.28815-2-sherry.sun@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1464,12 +1464,32 @@ static void lpuart_break_ctl(struct uart_port *port, int break_state)
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static void lpuart32_break_ctl(struct uart_port *port, int break_state)
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{
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unsigned long temp;
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unsigned long temp, modem;
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struct tty_struct *tty;
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unsigned int cflag = 0;
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tty = tty_port_tty_get(&port->state->port);
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if (tty) {
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cflag = tty->termios.c_cflag;
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tty_kref_put(tty);
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}
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temp = lpuart32_read(port, UARTCTRL) & ~UARTCTRL_SBK;
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modem = lpuart32_read(port, UARTMODIR);
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if (break_state != 0)
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if (break_state != 0) {
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temp |= UARTCTRL_SBK;
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/*
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* LPUART CTS has higher priority than SBK, need to disable CTS before
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* asserting SBK to avoid any interference if flow control is enabled.
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*/
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if (cflag & CRTSCTS && modem & UARTMODIR_TXCTSE)
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lpuart32_write(port, modem & ~UARTMODIR_TXCTSE, UARTMODIR);
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} else {
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/* Re-enable the CTS when break off. */
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if (cflag & CRTSCTS && !(modem & UARTMODIR_TXCTSE))
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lpuart32_write(port, modem | UARTMODIR_TXCTSE, UARTMODIR);
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}
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lpuart32_write(port, temp, UARTCTRL);
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}
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