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Merge back cpufreq material for 6.12
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commit
c4a6c82c9e
@ -575,30 +575,11 @@ unsigned int cpufreq_policy_transition_delay_us(struct cpufreq_policy *policy)
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return policy->transition_delay_us;
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latency = policy->cpuinfo.transition_latency / NSEC_PER_USEC;
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if (latency) {
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unsigned int max_delay_us = 2 * MSEC_PER_SEC;
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if (latency)
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/* Give a 50% breathing room between updates */
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return latency + (latency >> 1);
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/*
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* If the platform already has high transition_latency, use it
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* as-is.
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*/
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if (latency > max_delay_us)
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return latency;
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/*
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* For platforms that can change the frequency very fast (< 2
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* us), the above formula gives a decent transition delay. But
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* for platforms where transition_latency is in milliseconds, it
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* ends up giving unrealistic values.
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*
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* Cap the default transition delay to 2 ms, which seems to be
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* a reasonable amount of time after which we should reevaluate
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* the frequency.
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*/
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return min(latency * LATENCY_MULTIPLIER, max_delay_us);
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}
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return LATENCY_MULTIPLIER;
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return USEC_PER_MSEC;
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}
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EXPORT_SYMBOL_GPL(cpufreq_policy_transition_delay_us);
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@ -2425,6 +2425,10 @@ static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = {
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X86_MATCH(INTEL_ICELAKE_X, core_funcs),
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X86_MATCH(INTEL_SAPPHIRERAPIDS_X, core_funcs),
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X86_MATCH(INTEL_EMERALDRAPIDS_X, core_funcs),
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X86_MATCH(INTEL_GRANITERAPIDS_D, core_funcs),
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X86_MATCH(INTEL_GRANITERAPIDS_X, core_funcs),
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X86_MATCH(INTEL_ATOM_CRESTMONT, core_funcs),
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X86_MATCH(INTEL_ATOM_CRESTMONT_X, core_funcs),
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{}
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};
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#endif
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@ -238,4 +238,5 @@ bail_noprops:
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module_init(maple_cpufreq_init);
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MODULE_DESCRIPTION("cpufreq driver for Maple 970FX/970MP boards");
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MODULE_LICENSE("GPL");
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@ -269,5 +269,6 @@ static void __exit pas_cpufreq_exit(void)
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module_init(pas_cpufreq_init);
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module_exit(pas_cpufreq_exit);
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MODULE_DESCRIPTION("cpufreq driver for PA Semi PWRficient");
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>");
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@ -671,4 +671,5 @@ static int __init g5_cpufreq_init(void)
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module_init(g5_cpufreq_init);
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MODULE_DESCRIPTION("cpufreq driver for SMU & 970FX based G5 Macs");
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MODULE_LICENSE("GPL");
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@ -1160,5 +1160,6 @@ static void __exit powernv_cpufreq_exit(void)
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}
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module_exit(powernv_cpufreq_exit);
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MODULE_DESCRIPTION("cpufreq driver for IBM/OpenPOWER powernv systems");
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");
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@ -168,5 +168,6 @@ static void __exit cbe_cpufreq_exit(void)
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module_init(cbe_cpufreq_init);
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module_exit(cbe_cpufreq_exit);
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MODULE_DESCRIPTION("cpufreq driver for Cell BE processors");
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Christian Krafft <krafft@de.ibm.com>");
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@ -577,12 +577,6 @@ static inline unsigned long cpufreq_scale(unsigned long old, u_int div,
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#define CPUFREQ_POLICY_POWERSAVE (1)
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#define CPUFREQ_POLICY_PERFORMANCE (2)
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/*
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* The polling frequency depends on the capability of the processor. Default
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* polling frequency is 1000 times the transition latency of the processor.
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*/
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#define LATENCY_MULTIPLIER (1000)
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struct cpufreq_governor {
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char name[CPUFREQ_NAME_LEN];
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int (*init)(struct cpufreq_policy *policy);
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