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ARM: dts: sun9i: Fix Display Engine DTC warnings

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Our display engine endpoints trigger some DTC warnings due to the fact that
we're having a single endpoint that doesn't need any reg property, and
since we don't have a reg property, we don't need the address-cells and
size-cells properties anymore.

Fix those

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This commit is contained in:
Maxime Ripard 2019-03-14 21:16:33 +01:00
parent 109b7bfa77
commit c4953ba1ed
No known key found for this signature in database
GPG Key ID: E3EF0D6F671851C5
2 changed files with 15 additions and 64 deletions
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15
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
View File

@ -89,31 +89,23 @@
vga-dac {
compatible = "corpro,gm7123", "adi,adv7123", "dumb-vga-dac";
vdd-supply = <&reg_dcdc1>;
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
vga_dac_in: endpoint@0 {
reg = <0>;
vga_dac_in: endpoint {
remote-endpoint = <&tcon0_out_vga>;
};
};
port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
vga_dac_out: endpoint@0 {
reg = <0>;
vga_dac_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
@ -502,8 +494,7 @@
};
&tcon0_out {
tcon0_out_vga: endpoint@0 {
reg = <0>;
tcon0_out_vga: endpoint {
remote-endpoint = <&vga_dac_in>;
};
};

64
arch/arm/boot/dts/sun9i-a80.dtsi
View File

@ -596,12 +596,9 @@
#size-cells = <0>;
fe0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
fe0_out_deu0: endpoint@0 {
reg = <0>;
fe0_out_deu0: endpoint {
remote-endpoint = <&deu0_in_fe0>;
};
};
@ -623,12 +620,9 @@
#size-cells = <0>;
fe1_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
fe1_out_deu1: endpoint@0 {
reg = <0>;
fe1_out_deu1: endpoint {
remote-endpoint = <&deu1_in_fe1>;
};
};
@ -666,12 +660,9 @@
};
be0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
be0_out_drc0: endpoint@0 {
reg = <0>;
be0_out_drc0: endpoint {
remote-endpoint = <&drc0_in_be0>;
};
};
@ -709,12 +700,9 @@
};
be1_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
be1_out_drc1: endpoint@0 {
reg = <0>;
be1_out_drc1: endpoint {
remote-endpoint = <&drc1_in_be1>;
};
};
@ -738,12 +726,9 @@
#size-cells = <0>;
deu0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
deu0_in_fe0: endpoint@0 {
reg = <0>;
deu0_in_fe0: endpoint {
remote-endpoint = <&fe0_out_deu0>;
};
};
@ -783,12 +768,9 @@
#size-cells = <0>;
deu1_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
deu1_in_fe1: endpoint@0 {
reg = <0>;
deu1_in_fe1: endpoint {
remote-endpoint = <&fe1_out_deu1>;
};
};
@ -828,23 +810,17 @@
#size-cells = <0>;
drc0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
drc0_in_be0: endpoint@0 {
reg = <0>;
drc0_in_be0: endpoint {
remote-endpoint = <&be0_out_drc0>;
};
};
drc0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
drc0_out_tcon0: endpoint@0 {
reg = <0>;
drc0_out_tcon0: endpoint {
remote-endpoint = <&tcon0_in_drc0>;
};
};
@ -868,23 +844,17 @@
#size-cells = <0>;
drc1_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
drc1_in_be1: endpoint@0 {
reg = <0>;
drc1_in_be1: endpoint {
remote-endpoint = <&be1_out_drc1>;
};
};
drc1_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
drc1_out_tcon1: endpoint@0 {
reg = <0>;
drc1_out_tcon1: endpoint {
remote-endpoint = <&tcon1_in_drc1>;
};
};
@ -906,19 +876,14 @@
#size-cells = <0>;
tcon0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tcon0_in_drc0: endpoint@0 {
reg = <0>;
tcon0_in_drc0: endpoint {
remote-endpoint = <&drc0_out_tcon0>;
};
};
tcon0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
};
@ -938,19 +903,14 @@
#size-cells = <0>;
tcon1_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tcon1_in_drc1: endpoint@0 {
reg = <0>;
tcon1_in_drc1: endpoint {
remote-endpoint = <&drc1_out_tcon1>;
};
};
tcon1_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
};