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serial: 8250_mid: recognize interrupt source in handler
There is a special register that shows interrupt status by source. In
particular case the source can be a combination of DMA Tx, DMA Rx, and UART.
Read the register and call the handlers only for sources that request an
interrupt.
Fixes: 6ede6dcd87
("serial: 8250_mid: add support for DMA engine handling from UART MMIO")
Cc: stable@vger.kernel.org
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
107e15fc1f
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@ -25,6 +25,7 @@
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#define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8
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/* Intel MID Specific registers */
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#define INTEL_MID_UART_DNV_FISR 0x08
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#define INTEL_MID_UART_PS 0x30
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#define INTEL_MID_UART_MUL 0x34
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#define INTEL_MID_UART_DIV 0x38
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@ -90,16 +91,16 @@ static int tng_setup(struct mid8250 *mid, struct uart_port *p)
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static int dnv_handle_irq(struct uart_port *p)
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{
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struct mid8250 *mid = p->private_data;
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int ret;
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unsigned int fisr = serial_port_in(p, INTEL_MID_UART_DNV_FISR);
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int ret = IRQ_NONE;
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ret = hsu_dma_irq(&mid->dma_chip, 0);
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ret |= hsu_dma_irq(&mid->dma_chip, 1);
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/* For now, letting the HW generate separate interrupt for the UART */
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if (ret)
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return ret;
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return serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
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if (fisr & BIT(2))
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ret |= hsu_dma_irq(&mid->dma_chip, 1);
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if (fisr & BIT(1))
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ret |= hsu_dma_irq(&mid->dma_chip, 0);
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if (fisr & BIT(0))
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ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
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return ret;
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}
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#define DNV_DMA_CHAN_OFFSET 0x80
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