mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-18 17:54:13 +08:00
[SCSI] qla2xxx: Correct staging of RISC while attempting to pause.
There's no need to reset the RISC prior to pausing. Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
This commit is contained in:
parent
05236a050f
commit
c3b058afae
@ -172,19 +172,16 @@ qla24xx_pause_risc(struct device_reg_24xx __iomem *reg)
|
|||||||
int rval = QLA_SUCCESS;
|
int rval = QLA_SUCCESS;
|
||||||
uint32_t cnt;
|
uint32_t cnt;
|
||||||
|
|
||||||
if ((RD_REG_DWORD(®->hccr) & HCCRX_RISC_PAUSE) == 0) {
|
if (RD_REG_DWORD(®->hccr) & HCCRX_RISC_PAUSE)
|
||||||
WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET |
|
return rval;
|
||||||
HCCRX_CLR_HOST_INT);
|
|
||||||
RD_REG_DWORD(®->hccr); /* PCI Posting. */
|
WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_PAUSE);
|
||||||
WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_PAUSE);
|
for (cnt = 30000; (RD_REG_DWORD(®->hccr) & HCCRX_RISC_PAUSE) == 0 &&
|
||||||
for (cnt = 30000;
|
rval == QLA_SUCCESS; cnt--) {
|
||||||
(RD_REG_DWORD(®->hccr) & HCCRX_RISC_PAUSE) == 0 &&
|
if (cnt)
|
||||||
rval == QLA_SUCCESS; cnt--) {
|
udelay(100);
|
||||||
if (cnt)
|
else
|
||||||
udelay(100);
|
rval = QLA_FUNCTION_TIMEOUT;
|
||||||
else
|
|
||||||
rval = QLA_FUNCTION_TIMEOUT;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return rval;
|
return rval;
|
||||||
|
Loading…
Reference in New Issue
Block a user