mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-19 10:14:23 +08:00
drm/i915/cnl: Fix the CURSOR_COEFF_MASK used in DDI Vswing Programming
The Cursor Coeff is lower 6 bits in the PORT_TX_DW4 register and hence the CURSOR_COEFF_MASK should be (0x3F << 0) Fixes:04416108cc
("drm/i915/cnl: Add registers related to voltage swing sequences.") Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1498785241-21138-1-git-send-email-manasi.d.navare@intel.com (cherry picked from commitfcace3b9b7
) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
parent
2347728934
commit
c379b897ba
@ -1802,7 +1802,7 @@ enum skl_disp_power_wells {
|
|||||||
#define POST_CURSOR_2(x) ((x) << 6)
|
#define POST_CURSOR_2(x) ((x) << 6)
|
||||||
#define POST_CURSOR_2_MASK (0x3F << 6)
|
#define POST_CURSOR_2_MASK (0x3F << 6)
|
||||||
#define CURSOR_COEFF(x) ((x) << 0)
|
#define CURSOR_COEFF(x) ((x) << 0)
|
||||||
#define CURSOR_COEFF_MASK (0x3F << 6)
|
#define CURSOR_COEFF_MASK (0x3F << 0)
|
||||||
|
|
||||||
#define _CNL_PORT_TX_DW5_GRP_AE 0x162354
|
#define _CNL_PORT_TX_DW5_GRP_AE 0x162354
|
||||||
#define _CNL_PORT_TX_DW5_GRP_B 0x1623D4
|
#define _CNL_PORT_TX_DW5_GRP_B 0x1623D4
|
||||||
|
Loading…
Reference in New Issue
Block a user