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drm/i915: skylake sprite plane scaling using shared scalers
This patch enables skylake sprite plane display scaling using shared scalers atomic desgin. v2: -use single copy of scaler limits (Matt) v3: -detaching scalers moved to crtc commit path (Matt) v4: -changes to align with updated scaler structures (Matt, me) -keep sprite src rect in 16.16 format (Matt, Daniel) v5: -rebased on top of 90/270 rotation changes (me) -Refactored skl_update_plane to reduce its size (Daniel) It is a step towards having a single function covering all planes. Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Testcase: igt/kms_plane_scaling Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Chandra Konduru
Daniel Vetter
parent
6156a45602
commit
c331879ce8
@ -33,6 +33,7 @@
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#include <drm/drm_crtc.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_rect.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_plane_helper.h>
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#include "intel_drv.h"
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#include <drm/i915_drm.h>
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@ -197,80 +198,17 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc,
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u32 tile_height, plane_offset, plane_size;
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unsigned int rotation;
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int x_offset, y_offset;
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struct intel_crtc_state *crtc_state = to_intel_crtc(crtc)->config;
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int scaler_id;
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plane_ctl = PLANE_CTL_ENABLE |
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PLANE_CTL_PIPE_CSC_ENABLE;
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switch (fb->pixel_format) {
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case DRM_FORMAT_RGB565:
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plane_ctl |= PLANE_CTL_FORMAT_RGB_565;
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break;
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case DRM_FORMAT_XBGR8888:
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plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888 | PLANE_CTL_ORDER_RGBX;
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break;
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case DRM_FORMAT_XRGB8888:
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plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
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break;
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/*
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* XXX: For ARBG/ABGR formats we default to expecting scanout buffers
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* to be already pre-multiplied. We need to add a knob (or a different
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* DRM_FORMAT) for user-space to configure that.
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*/
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case DRM_FORMAT_ABGR8888:
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plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888 |
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PLANE_CTL_ORDER_RGBX |
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PLANE_CTL_ALPHA_SW_PREMULTIPLY;
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break;
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case DRM_FORMAT_ARGB8888:
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plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888 |
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PLANE_CTL_ALPHA_SW_PREMULTIPLY;
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break;
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case DRM_FORMAT_YUYV:
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plane_ctl |= PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;
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break;
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case DRM_FORMAT_YVYU:
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plane_ctl |= PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YVYU;
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break;
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case DRM_FORMAT_UYVY:
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plane_ctl |= PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_UYVY;
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break;
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case DRM_FORMAT_VYUY:
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plane_ctl |= PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
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break;
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default:
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BUG();
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}
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switch (fb->modifier[0]) {
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case DRM_FORMAT_MOD_NONE:
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break;
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case I915_FORMAT_MOD_X_TILED:
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plane_ctl |= PLANE_CTL_TILED_X;
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break;
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case I915_FORMAT_MOD_Y_TILED:
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plane_ctl |= PLANE_CTL_TILED_Y;
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break;
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case I915_FORMAT_MOD_Yf_TILED:
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plane_ctl |= PLANE_CTL_TILED_YF;
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break;
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default:
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MISSING_CASE(fb->modifier[0]);
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}
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plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
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plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
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rotation = drm_plane->state->rotation;
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switch (rotation) {
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case BIT(DRM_ROTATE_90):
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plane_ctl |= PLANE_CTL_ROTATE_90;
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break;
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case BIT(DRM_ROTATE_180):
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plane_ctl |= PLANE_CTL_ROTATE_180;
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break;
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case BIT(DRM_ROTATE_270):
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plane_ctl |= PLANE_CTL_ROTATE_270;
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break;
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}
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plane_ctl |= skl_plane_ctl_rotation(rotation);
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intel_update_sprite_watermarks(drm_plane, crtc, src_w, src_h,
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pixel_size, true,
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@ -279,6 +217,8 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc,
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stride_div = intel_fb_stride_alignment(dev, fb->modifier[0],
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fb->pixel_format);
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scaler_id = to_intel_plane_state(drm_plane->state)->scaler_id;
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/* Sizes are 0 based */
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src_w--;
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src_h--;
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@ -316,8 +256,27 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc,
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I915_WRITE(PLANE_OFFSET(pipe, plane), plane_offset);
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I915_WRITE(PLANE_STRIDE(pipe, plane), stride);
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I915_WRITE(PLANE_POS(pipe, plane), (crtc_y << 16) | crtc_x);
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I915_WRITE(PLANE_SIZE(pipe, plane), plane_size);
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/* program plane scaler */
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if (scaler_id >= 0) {
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uint32_t ps_ctrl = 0;
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DRM_DEBUG_KMS("plane = %d PS_PLANE_SEL(plane) = 0x%x\n", plane,
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PS_PLANE_SEL(plane));
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ps_ctrl = PS_SCALER_EN | PS_PLANE_SEL(plane) |
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crtc_state->scaler_state.scalers[scaler_id].mode;
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I915_WRITE(SKL_PS_CTRL(pipe, scaler_id), ps_ctrl);
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I915_WRITE(SKL_PS_PWR_GATE(pipe, scaler_id), 0);
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I915_WRITE(SKL_PS_WIN_POS(pipe, scaler_id), (crtc_x << 16) | crtc_y);
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I915_WRITE(SKL_PS_WIN_SZ(pipe, scaler_id),
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((crtc_w + 1) << 16)|(crtc_h + 1));
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I915_WRITE(PLANE_POS(pipe, plane), 0);
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} else {
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I915_WRITE(PLANE_POS(pipe, plane), (crtc_y << 16) | crtc_x);
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}
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I915_WRITE(PLANE_CTL(pipe, plane), plane_ctl);
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I915_WRITE(PLANE_SURF(pipe, plane), surf_addr);
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POSTING_READ(PLANE_SURF(pipe, plane));
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@ -894,7 +853,9 @@ static int
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intel_check_sprite_plane(struct drm_plane *plane,
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struct intel_plane_state *state)
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{
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struct drm_device *dev = plane->dev;
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struct intel_crtc *intel_crtc = to_intel_crtc(state->base.crtc);
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struct intel_crtc_state *crtc_state;
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struct intel_plane *intel_plane = to_intel_plane(plane);
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struct drm_framebuffer *fb = state->base.fb;
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int crtc_x, crtc_y;
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@ -906,8 +867,11 @@ intel_check_sprite_plane(struct drm_plane *plane,
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int hscale, vscale;
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int max_scale, min_scale;
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int pixel_size;
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int ret;
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intel_crtc = intel_crtc ? intel_crtc : to_intel_crtc(plane->crtc);
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crtc_state = state->base.state ?
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intel_atomic_get_crtc_state(state->base.state, intel_crtc) : NULL;
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if (!fb) {
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state->visible = false;
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@ -934,6 +898,11 @@ intel_check_sprite_plane(struct drm_plane *plane,
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max_scale = intel_plane->max_downscale << 16;
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min_scale = intel_plane->can_scale ? 1 : (1 << 16);
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if (INTEL_INFO(dev)->gen >= 9) {
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min_scale = 1;
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max_scale = skl_max_scale(intel_crtc, crtc_state);
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}
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drm_rect_rotate(src, fb->width << 16, fb->height << 16,
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state->base.rotation);
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@ -1029,8 +998,8 @@ intel_check_sprite_plane(struct drm_plane *plane,
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width_bytes = ((src_x * pixel_size) & 63) +
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src_w * pixel_size;
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if (src_w > 2048 || src_h > 2048 ||
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width_bytes > 4096 || fb->pitches[0] > 4096) {
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if (INTEL_INFO(dev)->gen < 9 && (src_w > 2048 || src_h > 2048 ||
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width_bytes > 4096 || fb->pitches[0] > 4096)) {
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DRM_DEBUG_KMS("Source dimensions exceed hardware limits\n");
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return -EINVAL;
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}
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@ -1084,6 +1053,13 @@ finish:
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}
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}
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if (INTEL_INFO(dev)->gen >= 9) {
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ret = skl_update_scaler_users(intel_crtc, crtc_state, intel_plane,
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state, 0);
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if (ret)
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return ret;
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}
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return 0;
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}
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@ -1296,12 +1272,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
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}
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break;
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case 9:
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/*
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* FIXME: Skylake planes can be scaled (with some restrictions),
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* but this is for another time.
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*/
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intel_plane->can_scale = false;
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intel_plane->max_downscale = 1;
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intel_plane->can_scale = true;
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intel_plane->update_plane = skl_update_plane;
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intel_plane->disable_plane = skl_disable_plane;
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state->scaler_id = -1;
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