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clk: at91: clk-master: check if div or pres is zero
Check if div or pres is zero before using it as argument for ffs(). In case div is zero ffs() will return 0 and thus substracting from zero will lead to invalid values to be setup in registers. Fixes:7a110b9107
("clk: at91: clk-master: re-factor master clock") Fixes:75c88143f3
("clk: at91: clk-master: add master clock support for SAMA7G5") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20211011112719.3951784-9-claudiu.beznea@microchip.com Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -344,7 +344,7 @@ static int clk_master_pres_set_rate(struct clk_hw *hw, unsigned long rate,
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else if (pres == 3)
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pres = MASTER_PRES_MAX;
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else
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else if (pres)
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pres = ffs(pres) - 1;
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spin_lock_irqsave(master->lock, flags);
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@ -757,7 +757,7 @@ static int clk_sama7g5_master_set_rate(struct clk_hw *hw, unsigned long rate,
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if (div == 3)
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div = MASTER_PRES_MAX;
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else
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else if (div)
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div = ffs(div) - 1;
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spin_lock_irqsave(master->lock, flags);
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