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clk: at91: clk-master: check if div or pres is zero

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Check if div or pres is zero before using it as argument for ffs().
In case div is zero ffs() will return 0 and thus substracting from
zero will lead to invalid values to be setup in registers.

Fixes: 7a110b9107 ("clk: at91: clk-master: re-factor master clock")
Fixes: 75c88143f3 ("clk: at91: clk-master: add master clock support for SAMA7G5")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20211011112719.3951784-9-claudiu.beznea@microchip.com
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Claudiu Beznea 2021-10-11 14:27:12 +03:00 committed by Stephen Boyd
parent f12d028b74
commit c2910c00fe
1 changed files with 2 additions and 2 deletions
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4
drivers/clk/at91/clk-master.c
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@ -344,7 +344,7 @@ static int clk_master_pres_set_rate(struct clk_hw *hw, unsigned long rate,
else if (pres == 3) else if (pres == 3)
pres = MASTER_PRES_MAX; pres = MASTER_PRES_MAX;
else else if (pres)
pres = ffs(pres) - 1; pres = ffs(pres) - 1;
spin_lock_irqsave(master->lock, flags); spin_lock_irqsave(master->lock, flags);
@ -757,7 +757,7 @@ static int clk_sama7g5_master_set_rate(struct clk_hw *hw, unsigned long rate,
if (div == 3) if (div == 3)
div = MASTER_PRES_MAX; div = MASTER_PRES_MAX;
else else if (div)
div = ffs(div) - 1; div = ffs(div) - 1;
spin_lock_irqsave(master->lock, flags); spin_lock_irqsave(master->lock, flags);