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mmc: sdhci-pci-gli: GL9755: Mask the replay timer timeout of AER

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commit 85dd3af649 upstream.

Due to a flaw in the hardware design, the GL9755 replay timer frequently
times out when ASPM is enabled. As a result, the warning messages will
often appear in the system log when the system accesses the GL9755
PCI config. Therefore, the replay timer timeout must be masked.

Fixes: 36ed2fd32b ("mmc: sdhci-pci-gli: A workaround to allow GL9755 to enter ASPM L1.2")
Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Kai-Heng Feng <kai.heng.geng@canonical.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20231107095741.8832-3-victorshihgli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Victor Shih 2023-11-07 17:57:41 +08:00 committed by Greg Kroah-Hartman
parent b1f3291804
commit c242318d0b
1 changed files with 8 additions and 0 deletions
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8
drivers/mmc/host/sdhci-pci-gli.c
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@ -149,6 +149,9 @@
#define PCI_GLI_9755_PM_CTRL 0xFC
#define PCI_GLI_9755_PM_STATE GENMASK(1, 0)
#define PCI_GLI_9755_CORRERR_MASK 0x214
#define PCI_GLI_9755_CORRERR_MASK_REPLAY_TIMER_TIMEOUT BIT(12)
#define SDHCI_GLI_9767_GM_BURST_SIZE 0x510
#define SDHCI_GLI_9767_GM_BURST_SIZE_AXI_ALWAYS_SET BIT(8)
@ -756,6 +759,11 @@ static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
value &= ~PCI_GLI_9755_PM_STATE;
pci_write_config_dword(pdev, PCI_GLI_9755_PM_CTRL, value);
/* mask the replay timer timeout of AER */
pci_read_config_dword(pdev, PCI_GLI_9755_CORRERR_MASK, &value);
value |= PCI_GLI_9755_CORRERR_MASK_REPLAY_TIMER_TIMEOUT;
pci_write_config_dword(pdev, PCI_GLI_9755_CORRERR_MASK, value);
gl9755_wt_off(pdev);
}