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arm64: kprobe: protect/rename few definitions to be reused by uprobe
decode-insn code has to be reused by arm64 uprobe implementation as well. Therefore, this patch protects some portion of kprobe code and renames few other, so that decode-insn functionality can be reused by uprobe even when CONFIG_KPROBES is not defined. kprobe_opcode_t and struct arch_specific_insn are also defined by linux/kprobes.h, when CONFIG_KPROBES is not defined. So, protect these definitions in asm/probes.h. linux/kprobes.h already includes asm/kprobes.h. Therefore, remove inclusion of asm/kprobes.h from decode-insn.c. There are some definitions like kprobe_insn and kprobes_handler_t etc can be re-used by uprobe. So, it would be better to remove 'k' from their names. struct arch_specific_insn is specific to kprobe. Therefore, introduce a new struct arch_probe_insn which will be common for both kprobe and uprobe, so that decode-insn code can be shared. Modify kprobe code accordingly. Function arm_probe_decode_insn() will be needed by uprobe as well. So make it global. Signed-off-by: Pratyush Anand <panand@redhat.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -17,19 +17,22 @@
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#include <asm/opcodes.h>
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struct kprobe;
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struct arch_specific_insn;
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typedef u32 kprobe_opcode_t;
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typedef void (kprobes_handler_t) (u32 opcode, long addr, struct pt_regs *);
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typedef u32 probe_opcode_t;
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typedef void (probes_handler_t) (u32 opcode, long addr, struct pt_regs *);
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/* architecture specific copy of original instruction */
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struct arch_specific_insn {
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kprobe_opcode_t *insn;
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struct arch_probe_insn {
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probe_opcode_t *insn;
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pstate_check_t *pstate_cc;
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kprobes_handler_t *handler;
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probes_handler_t *handler;
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/* restore address after step xol */
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unsigned long restore;
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};
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#ifdef CONFIG_KPROBES
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typedef u32 kprobe_opcode_t;
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struct arch_specific_insn {
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struct arch_probe_insn api;
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};
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#endif
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#endif
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@ -78,8 +78,8 @@ static bool __kprobes aarch64_insn_is_steppable(u32 insn)
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* INSN_GOOD If instruction is supported and uses instruction slot,
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* INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot.
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*/
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static enum kprobe_insn __kprobes
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arm_probe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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enum probe_insn __kprobes
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arm_probe_decode_insn(probe_opcode_t insn, struct arch_probe_insn *api)
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{
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/*
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* Instructions reading or modifying the PC won't work from the XOL
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@ -89,26 +89,26 @@ arm_probe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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return INSN_GOOD;
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if (aarch64_insn_is_bcond(insn)) {
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asi->handler = simulate_b_cond;
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api->handler = simulate_b_cond;
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} else if (aarch64_insn_is_cbz(insn) ||
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aarch64_insn_is_cbnz(insn)) {
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asi->handler = simulate_cbz_cbnz;
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api->handler = simulate_cbz_cbnz;
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} else if (aarch64_insn_is_tbz(insn) ||
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aarch64_insn_is_tbnz(insn)) {
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asi->handler = simulate_tbz_tbnz;
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api->handler = simulate_tbz_tbnz;
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} else if (aarch64_insn_is_adr_adrp(insn)) {
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asi->handler = simulate_adr_adrp;
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api->handler = simulate_adr_adrp;
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} else if (aarch64_insn_is_b(insn) ||
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aarch64_insn_is_bl(insn)) {
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asi->handler = simulate_b_bl;
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api->handler = simulate_b_bl;
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} else if (aarch64_insn_is_br(insn) ||
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aarch64_insn_is_blr(insn) ||
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aarch64_insn_is_ret(insn)) {
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asi->handler = simulate_br_blr_ret;
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api->handler = simulate_br_blr_ret;
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} else if (aarch64_insn_is_ldr_lit(insn)) {
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asi->handler = simulate_ldr_literal;
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api->handler = simulate_ldr_literal;
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} else if (aarch64_insn_is_ldrsw_lit(insn)) {
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asi->handler = simulate_ldrsw_literal;
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api->handler = simulate_ldrsw_literal;
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} else {
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/*
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* Instruction cannot be stepped out-of-line and we don't
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@ -120,6 +120,7 @@ arm_probe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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return INSN_GOOD_NO_SLOT;
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}
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#ifdef CONFIG_KPROBES
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static bool __kprobes
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is_probed_address_atomic(kprobe_opcode_t *scan_start, kprobe_opcode_t *scan_end)
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{
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@ -138,12 +139,12 @@ is_probed_address_atomic(kprobe_opcode_t *scan_start, kprobe_opcode_t *scan_end)
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return false;
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}
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enum kprobe_insn __kprobes
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enum probe_insn __kprobes
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arm_kprobe_decode_insn(kprobe_opcode_t *addr, struct arch_specific_insn *asi)
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{
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enum kprobe_insn decoded;
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kprobe_opcode_t insn = le32_to_cpu(*addr);
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kprobe_opcode_t *scan_end = NULL;
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enum probe_insn decoded;
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probe_opcode_t insn = le32_to_cpu(*addr);
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probe_opcode_t *scan_end = NULL;
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unsigned long size = 0, offset = 0;
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/*
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@ -162,7 +163,7 @@ arm_kprobe_decode_insn(kprobe_opcode_t *addr, struct arch_specific_insn *asi)
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else
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scan_end = addr - MAX_ATOMIC_CONTEXT_SIZE;
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}
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decoded = arm_probe_decode_insn(insn, asi);
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decoded = arm_probe_decode_insn(insn, &asi->api);
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if (decoded != INSN_REJECTED && scan_end)
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if (is_probed_address_atomic(addr - 1, scan_end))
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@ -170,3 +171,4 @@ arm_kprobe_decode_insn(kprobe_opcode_t *addr, struct arch_specific_insn *asi)
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return decoded;
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}
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#endif
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@ -23,13 +23,17 @@
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*/
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#define MAX_ATOMIC_CONTEXT_SIZE (128 / sizeof(kprobe_opcode_t))
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enum kprobe_insn {
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enum probe_insn {
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INSN_REJECTED,
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INSN_GOOD_NO_SLOT,
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INSN_GOOD,
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};
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enum kprobe_insn __kprobes
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#ifdef CONFIG_KPROBES
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enum probe_insn __kprobes
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arm_kprobe_decode_insn(kprobe_opcode_t *addr, struct arch_specific_insn *asi);
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#endif
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enum probe_insn __kprobes
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arm_probe_decode_insn(probe_opcode_t insn, struct arch_probe_insn *asi);
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#endif /* _ARM_KERNEL_KPROBES_ARM64_H */
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@ -44,31 +44,31 @@ post_kprobe_handler(struct kprobe_ctlblk *, struct pt_regs *);
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static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
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{
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/* prepare insn slot */
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p->ainsn.insn[0] = cpu_to_le32(p->opcode);
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p->ainsn.api.insn[0] = cpu_to_le32(p->opcode);
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flush_icache_range((uintptr_t) (p->ainsn.insn),
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(uintptr_t) (p->ainsn.insn) +
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flush_icache_range((uintptr_t) (p->ainsn.api.insn),
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(uintptr_t) (p->ainsn.api.insn) +
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MAX_INSN_SIZE * sizeof(kprobe_opcode_t));
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/*
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* Needs restoring of return address after stepping xol.
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*/
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p->ainsn.restore = (unsigned long) p->addr +
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p->ainsn.api.restore = (unsigned long) p->addr +
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sizeof(kprobe_opcode_t);
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}
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static void __kprobes arch_prepare_simulate(struct kprobe *p)
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{
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/* This instructions is not executed xol. No need to adjust the PC */
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p->ainsn.restore = 0;
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p->ainsn.api.restore = 0;
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}
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static void __kprobes arch_simulate_insn(struct kprobe *p, struct pt_regs *regs)
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{
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struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
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if (p->ainsn.handler)
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p->ainsn.handler((u32)p->opcode, (long)p->addr, regs);
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if (p->ainsn.api.handler)
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p->ainsn.api.handler((u32)p->opcode, (long)p->addr, regs);
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/* single step simulated, now go for post processing */
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post_kprobe_handler(kcb, regs);
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@ -98,18 +98,18 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
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return -EINVAL;
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case INSN_GOOD_NO_SLOT: /* insn need simulation */
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p->ainsn.insn = NULL;
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p->ainsn.api.insn = NULL;
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break;
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case INSN_GOOD: /* instruction uses slot */
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p->ainsn.insn = get_insn_slot();
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if (!p->ainsn.insn)
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p->ainsn.api.insn = get_insn_slot();
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if (!p->ainsn.api.insn)
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return -ENOMEM;
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break;
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};
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/* prepare the instruction */
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if (p->ainsn.insn)
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if (p->ainsn.api.insn)
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arch_prepare_ss_slot(p);
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else
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arch_prepare_simulate(p);
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@ -142,9 +142,9 @@ void __kprobes arch_disarm_kprobe(struct kprobe *p)
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void __kprobes arch_remove_kprobe(struct kprobe *p)
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{
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if (p->ainsn.insn) {
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free_insn_slot(p->ainsn.insn, 0);
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p->ainsn.insn = NULL;
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if (p->ainsn.api.insn) {
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free_insn_slot(p->ainsn.api.insn, 0);
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p->ainsn.api.insn = NULL;
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}
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}
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@ -244,9 +244,9 @@ static void __kprobes setup_singlestep(struct kprobe *p,
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}
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if (p->ainsn.insn) {
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if (p->ainsn.api.insn) {
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/* prepare for single stepping */
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slot = (unsigned long)p->ainsn.insn;
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slot = (unsigned long)p->ainsn.api.insn;
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set_ss_context(kcb, slot); /* mark pending ss */
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@ -295,8 +295,8 @@ post_kprobe_handler(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
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return;
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/* return addr restore if non-branching insn */
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if (cur->ainsn.restore != 0)
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instruction_pointer_set(regs, cur->ainsn.restore);
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if (cur->ainsn.api.restore != 0)
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instruction_pointer_set(regs, cur->ainsn.api.restore);
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/* restore back original saved kprobe variables and continue */
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if (kcb->kprobe_status == KPROBE_REENTER) {
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