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sh updates for v6.5

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- sh: Provide unxlate_dev_mem_ptr() in asm/io.h
 - sh: dma: Correct the number of DMA channels for SH7709
 - sh: dma: Drop incorrect SH_DMAC_BASE1 definition for SH4
 - sh: dma: Fix DMA channel offset calculation
 - sh: Remove compiler flag duplication
 - sh: Refactor header include path addition
 - sh: Move build rule for cchips/hd6446x/ to arch/sh/Kbuild
 - sh: Fix -Wmissing-include-dirs warnings for various platforms
 - sh: Avoid using IRQ0 on SH3 and SH4
 - sh: j2: Use ioremap() to translate device tree address into kernel memory
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Merge tag 'sh-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/glaubitz/sh-linux

Pull sh updates from Adrian Glaubitz:
 "Fix a compiler warning in the J2 probing code and a fix by Sergey
  Shtylyov to avoid using IRQ0 on SH3 and SH4 targets. Masahiro Yamada
  made some clean-up in the build system to address reports by the 0day
  bot.

  The most notable changes come from Artur Rojek who addressed a number
  of issues in the DMA code, in particular a fix for the DMA channel
  offset calculation that was introduced in in 7f47c7189b ("sh: dma:
  More legacy cpu dma chainsawing.") in 2012!

  Together with another change to correct the number of DMA channels for
  each SuperH SoC according to specification, Artur's series unbreaks
  the kernel on the SH7709 SoC allowing Linux to boot on the HP Jornada
  680 handheld again.

  Summary:

   - Provide unxlate_dev_mem_ptr() in asm/io.h

   - dma: Correct the number of DMA channels for SH7709

   - dma: Drop incorrect SH_DMAC_BASE1 definition for SH4

   - dma: Fix DMA channel offset calculation

   - Remove compiler flag duplication

   - Refactor header include path addition

   - Move build rule for cchips/hd6446x/ to arch/sh/Kbuild

   - Fix -Wmissing-include-dirs warnings for various platforms

   - Avoid using IRQ0 on SH3 and SH4

   - j2: Use ioremap() to translate device tree address into kernel
     memory"

* tag 'sh-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/glaubitz/sh-linux:
  sh: Provide unxlate_dev_mem_ptr() in asm/io.h
  sh: dma: Correct the number of DMA channels for SH7709
  sh: dma: Drop incorrect SH_DMAC_BASE1 definition for SH4
  sh: dma: Fix DMA channel offset calculation
  sh: Remove compiler flag duplication
  sh: Refactor header include path addition
  sh: Move build rule for cchips/hd6446x/ to arch/sh/Kbuild
  sh: Fix -Wmissing-include-dirs warnings for various platforms
  sh: Avoid using IRQ0 on SH3 and SH4
  sh: j2: Use ioremap() to translate device tree address into kernel memory
This commit is contained in:
Linus Torvalds 2023-07-05 21:45:32 -07:00
commit c17414a273
14 changed files with 66 additions and 54 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/sh/Kbuild
View File

@ -3,5 +3,7 @@ obj-y += kernel/ mm/ boards/
obj-$(CONFIG_SH_FPU_EMU) += math-emu/
obj-$(CONFIG_USE_BUILTIN_DTB) += boot/dts/
obj-$(CONFIG_HD6446X_SERIES) += cchips/hd6446x/
# for cleaning
subdir- += boot

26
arch/sh/Makefile
View File

@ -116,34 +116,15 @@ export ld-bfd
# Mach groups
machdir-$(CONFIG_SOLUTION_ENGINE) += mach-se
machdir-$(CONFIG_SH_HP6XX) += mach-hp6xx
machdir-$(CONFIG_SH_DREAMCAST) += mach-dreamcast
machdir-$(CONFIG_SH_SH03) += mach-sh03
machdir-$(CONFIG_SH_RTS7751R2D) += mach-r2d
machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander
machdir-$(CONFIG_SH_MIGOR) += mach-migor
machdir-$(CONFIG_SH_AP325RXA) += mach-ap325rxa
machdir-$(CONFIG_SH_KFR2R09) += mach-kfr2r09
machdir-$(CONFIG_SH_ECOVEC) += mach-ecovec24
machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780
machdir-$(CONFIG_SH_SDK7786) += mach-sdk7786
machdir-$(CONFIG_SH_X3PROTO) += mach-x3proto
machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp
machdir-$(CONFIG_SH_SH4202_MICRODEV) += mach-microdev
machdir-$(CONFIG_SH_LANDISK) += mach-landisk
machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2
machdir-$(CONFIG_SH_RSK) += mach-rsk
ifneq ($(machdir-y),)
core-y += $(addprefix arch/sh/boards/, \
$(filter-out ., $(patsubst %,%/,$(machdir-y))))
endif
# Common machine type headers. Not part of the arch/sh/boards/ hierarchy.
machdir-y += mach-common
# Companion chips
core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/
machdir-y += mach-common
#
# CPU header paths
@ -164,11 +145,8 @@ cpuincdir-y += cpu-common # Must be last
drivers-y += arch/sh/drivers/
cflags-y += $(foreach d, $(cpuincdir-y), -I $(srctree)/arch/sh/include/$(d)) \
$(foreach d, $(machdir-y), -I $(srctree)/arch/sh/include/$(d))
KBUILD_CPPFLAGS += $(addprefix -I $(srctree)/arch/sh/include/, $(cpuincdir-y) $(machdir-y))
KBUILD_CFLAGS += -pipe $(cflags-y)
KBUILD_CPPFLAGS += $(cflags-y)
KBUILD_AFLAGS += $(cflags-y)
ifeq ($(CONFIG_MCOUNT),y)

19
arch/sh/boards/Makefile
View File

@ -18,3 +18,22 @@ obj-$(CONFIG_SH_APSH4A3A) += board-apsh4a3a.o
obj-$(CONFIG_SH_APSH4AD0A) += board-apsh4ad0a.o
obj-$(CONFIG_SH_DEVICE_TREE) += of-generic.o
obj-$(CONFIG_SOLUTION_ENGINE) += mach-se/
obj-$(CONFIG_SH_HP6XX) += mach-hp6xx/
obj-$(CONFIG_SH_DREAMCAST) += mach-dreamcast/
obj-$(CONFIG_SH_SH03) += mach-sh03/
obj-$(CONFIG_SH_RTS7751R2D) += mach-r2d/
obj-$(CONFIG_SH_HIGHLANDER) += mach-highlander/
obj-$(CONFIG_SH_MIGOR) += mach-migor/
obj-$(CONFIG_SH_AP325RXA) += mach-ap325rxa/
obj-$(CONFIG_SH_KFR2R09) += mach-kfr2r09/
obj-$(CONFIG_SH_ECOVEC) += mach-ecovec24/
obj-$(CONFIG_SH_SDK7780) += mach-sdk7780/
obj-$(CONFIG_SH_SDK7786) += mach-sdk7786/
obj-$(CONFIG_SH_X3PROTO) += mach-x3proto/
obj-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp/
obj-$(CONFIG_SH_SH4202_MICRODEV)+= mach-microdev/
obj-$(CONFIG_SH_LANDISK) += mach-landisk/
obj-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2/
obj-$(CONFIG_SH_RSK) += mach-rsk/

14
arch/sh/drivers/dma/Kconfig
View File

@ -28,17 +28,19 @@ config SH_DMA_API
config NR_ONCHIP_DMA_CHANNELS
int
depends on SH_DMA
default "4" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \
CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091
default "4" if CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750 || \
CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7751 || \
CPU_SUBTYPE_SH7091
default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
CPU_SUBTYPE_SH7760
default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || \
CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724
default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7724 || \
CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
default "6"
help
This allows you to specify the number of channels that the on-chip
DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
DMAC supports. This will be 4 for SH7709/SH7750/SH7750S/SH7751/SH7091,
8 for SH7750R/SH7751R/SH7760, and 12 for SH7723/SH7724/SH7780/SH7785.
Default is 6.
config SH_DMABRG
bool "SH7760 DMABRG support"

37
arch/sh/drivers/dma/dma-sh.c
View File

@ -18,6 +18,18 @@
#include <cpu/dma-register.h>
#include <cpu/dma.h>
/*
* Some of the SoCs feature two DMAC modules. In such a case, the channels are
* distributed equally among them.
*/
#ifdef SH_DMAC_BASE1
#define SH_DMAC_NR_MD_CH (CONFIG_NR_ONCHIP_DMA_CHANNELS / 2)
#else
#define SH_DMAC_NR_MD_CH CONFIG_NR_ONCHIP_DMA_CHANNELS
#endif
#define SH_DMAC_CH_SZ 0x10
/*
* Define the default configuration for dual address memory-memory transfer.
* The 0x400 value represents auto-request, external->external.
@ -29,7 +41,7 @@ static unsigned long dma_find_base(unsigned int chan)
unsigned long base = SH_DMAC_BASE0;
#ifdef SH_DMAC_BASE1
if (chan >= 6)
if (chan >= SH_DMAC_NR_MD_CH)
base = SH_DMAC_BASE1;
#endif
@ -40,13 +52,13 @@ static unsigned long dma_base_addr(unsigned int chan)
{
unsigned long base = dma_find_base(chan);
/* Normalize offset calculation */
if (chan >= 9)
chan -= 6;
if (chan >= 4)
base += 0x10;
chan = (chan % SH_DMAC_NR_MD_CH) * SH_DMAC_CH_SZ;
return base + (chan * 0x10);
/* DMAOR is placed inside the channel register space. Step over it. */
if (chan >= DMAOR)
base += SH_DMAC_CH_SZ;
return base + chan;
}
#ifdef CONFIG_SH_DMA_IRQ_MULTI
@ -250,12 +262,11 @@ static int sh_dmac_get_dma_residue(struct dma_channel *chan)
#define NR_DMAOR 1
#endif
/*
* DMAOR bases are broken out amongst channel groups. DMAOR0 manages
* channels 0 - 5, DMAOR1 6 - 11 (optional).
*/
#define dmaor_read_reg(n) __raw_readw(dma_find_base((n)*6))
#define dmaor_write_reg(n, data) __raw_writew(data, dma_find_base(n)*6)
#define dmaor_read_reg(n) __raw_readw(dma_find_base((n) * \
SH_DMAC_NR_MD_CH) + DMAOR)
#define dmaor_write_reg(n, data) __raw_writew(data, \
dma_find_base((n) * \
SH_DMAC_NR_MD_CH) + DMAOR)
static inline int dmaor_reset(int no)
{

1
arch/sh/include/asm/io.h
View File

@ -286,6 +286,7 @@ static inline void iounmap(volatile void __iomem *addr) { }
* access
*/
#define xlate_dev_mem_ptr(p) __va(p)
#define unxlate_dev_mem_ptr(p, v) do { } while (0)
#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
int valid_phys_addr_range(phys_addr_t addr, size_t size);

1
arch/sh/include/cpu-sh4/cpu/dma.h
View File

@ -13,6 +13,5 @@
#define DMAE0_IRQ evt2irq(0x6c0)
#define SH_DMAC_BASE0 0xffa00000
#define SH_DMAC_BASE1 0xffa00070
#endif /* __ASM_CPU_SH4_DMA_H */

2
arch/sh/include/mach-common/mach/highlander.h
View File

@ -176,7 +176,7 @@
#define IVDR_CK_ON 4 /* iVDR Clock ON */
#endif
#define HL_FPGA_IRQ_BASE 200
#define HL_FPGA_IRQ_BASE (200 + 16)
#define HL_NR_IRL 15
#define IRQ_AX88796 (HL_FPGA_IRQ_BASE + 0)

2
arch/sh/include/mach-common/mach/r2d.h
View File

@ -47,7 +47,7 @@
#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
#define R2D_FPGA_IRQ_BASE 100
#define R2D_FPGA_IRQ_BASE (100 + 16)
#define IRQ_VOYAGER (R2D_FPGA_IRQ_BASE + 0)
#define IRQ_EXT (R2D_FPGA_IRQ_BASE + 1)

2
arch/sh/include/mach-dreamcast/mach/sysasic.h
View File

@ -22,7 +22,7 @@
takes.
*/
#define HW_EVENT_IRQ_BASE 48
#define HW_EVENT_IRQ_BASE (48 + 16)
/* IRQ 13 */
#define HW_EVENT_VSYNC (HW_EVENT_IRQ_BASE + 5) /* VSync */

2
arch/sh/include/mach-se/mach/se7724.h
View File

@ -37,7 +37,7 @@
#define IRQ2_IRQ evt2irq(0x640)
/* Bits in IRQ012 registers */
#define SE7724_FPGA_IRQ_BASE 220
#define SE7724_FPGA_IRQ_BASE (220 + 16)
/* IRQ0 */
#define IRQ0_BASE SE7724_FPGA_IRQ_BASE

2
arch/sh/kernel/cpu/sh2/probe.c
View File

@ -21,7 +21,7 @@ static int __init scan_cache(unsigned long node, const char *uname,
if (!of_flat_dt_is_compatible(node, "jcore,cache"))
return 0;
j2_ccr_base = (u32 __iomem *)of_flat_dt_translate_address(node);
j2_ccr_base = ioremap(of_flat_dt_translate_address(node), 4);
return 1;
}

4
arch/sh/kernel/cpu/sh3/entry.S
View File

@ -470,9 +470,9 @@ ENTRY(handle_interrupt)
mov r4, r0 ! save vector->jmp table offset for later
shlr2 r4 ! vector to IRQ# conversion
add #-0x10, r4
cmp/pz r4 ! is it a valid IRQ?
mov #0x10, r5
cmp/hs r5, r4 ! is it a valid IRQ?
bt 10f
/*

6
include/linux/sh_intc.h
View File

@ -13,9 +13,9 @@
/*
* Convert back and forth between INTEVT and IRQ values.
*/
#ifdef CONFIG_CPU_HAS_INTEVT
#define evt2irq(evt) (((evt) >> 5) - 16)
#define irq2evt(irq) (((irq) + 16) << 5)
#ifdef CONFIG_CPU_HAS_INTEVT /* Avoid IRQ0 (invalid for platform devices) */
#define evt2irq(evt) ((evt) >> 5)
#define irq2evt(irq) ((irq) << 5)
#else
#define evt2irq(evt) (evt)
#define irq2evt(irq) (irq)