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drm/tegra: Changes for v5.12-rc1

Browse Source 
Adds support for newer firmware image versions of the Video Image
 Composer (VIC) and adds a comment clarifying the use of the STREAMID
 registers. Fixes a couple of issues with display and gr2d on older
 Tegra SoCs such as Tegra114, as well as a runtime PM reference leak.
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Merge tag 'drm/tegra/for-5.12-rc1' of ssh://git.freedesktop.org/git/tegra/linux into drm-next

drm/tegra: Changes for v5.12-rc1

Adds support for newer firmware image versions of the Video Image
Composer (VIC) and adds a comment clarifying the use of the STREAMID
registers. Fixes a couple of issues with display and gr2d on older
Tegra SoCs such as Tegra114, as well as a runtime PM reference leak.

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Thierry Reding <thierry.reding@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210129193807.3653456-1-thierry.reding@gmail.com
This commit is contained in:
Dave Airlie 2021-02-04 12:31:16 +10:00
commit c106c5e2fd
9 changed files with 45 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/tegra/dc.c
View File

@ -2186,7 +2186,7 @@ static int tegra_dc_runtime_resume(struct host1x_client *client)
struct device *dev = client->dev;
int err;
err = pm_runtime_get_sync(dev);
err = pm_runtime_resume_and_get(dev);
if (err < 0) {
dev_err(dev, "failed to get runtime PM: %d\n", err);
return err;

2
drivers/gpu/drm/tegra/drm.c
View File

@ -1301,8 +1301,10 @@ static const struct of_device_id host1x_drm_subdevs[] = {
{ .compatible = "nvidia,tegra30-hdmi", },
{ .compatible = "nvidia,tegra30-gr2d", },
{ .compatible = "nvidia,tegra30-gr3d", },
{ .compatible = "nvidia,tegra114-dc", },
{ .compatible = "nvidia,tegra114-dsi", },
{ .compatible = "nvidia,tegra114-hdmi", },
{ .compatible = "nvidia,tegra114-gr2d", },
{ .compatible = "nvidia,tegra114-gr3d", },
{ .compatible = "nvidia,tegra124-dc", },
{ .compatible = "nvidia,tegra124-sor", },

2
drivers/gpu/drm/tegra/dsi.c
View File

@ -1111,7 +1111,7 @@ static int tegra_dsi_runtime_resume(struct host1x_client *client)
struct device *dev = client->dev;
int err;
err = pm_runtime_get_sync(dev);
err = pm_runtime_resume_and_get(dev);
if (err < 0) {
dev_err(dev, "failed to get runtime PM: %d\n", err);
return err;

9
drivers/gpu/drm/tegra/falcon.c
View File

@ -72,7 +72,7 @@ static int falcon_parse_firmware_image(struct falcon *falcon)
struct falcon_fw_os_header_v1 *os;
/* endian problems would show up right here */
if (bin->magic != PCI_VENDOR_ID_NVIDIA) {
if (bin->magic != PCI_VENDOR_ID_NVIDIA && bin->magic != 0x10fe) {
dev_err(falcon->dev, "incorrect firmware magic\n");
return -EINVAL;
}
@ -178,9 +178,10 @@ int falcon_boot(struct falcon *falcon)
falcon->firmware.data.offset + offset,
offset, FALCON_MEMORY_DATA);
/* copy the first code segment into Falcon internal memory */
falcon_copy_chunk(falcon, falcon->firmware.code.offset,
0, FALCON_MEMORY_IMEM);
/* copy the code segment into Falcon internal memory */
for (offset = 0; offset < falcon->firmware.code.size; offset += 256)
falcon_copy_chunk(falcon, falcon->firmware.code.offset + offset,
offset, FALCON_MEMORY_IMEM);
/* setup falcon interrupts */
falcon_writel(falcon, FALCON_IRQMSET_EXT(0xff) |

9
drivers/gpu/drm/tegra/gr2d.c
View File

@ -161,9 +161,14 @@ static const struct gr2d_soc tegra30_gr2d_soc = {
.version = 0x30,
};
static const struct gr2d_soc tegra114_gr2d_soc = {
.version = 0x35,
};
static const struct of_device_id gr2d_match[] = {
{ .compatible = "nvidia,tegra30-gr2d", .data = &tegra20_gr2d_soc },
{ .compatible = "nvidia,tegra20-gr2d", .data = &tegra30_gr2d_soc },
{ .compatible = "nvidia,tegra114-gr2d", .data = &tegra114_gr2d_soc },
{ .compatible = "nvidia,tegra30-gr2d", .data = &tegra30_gr2d_soc },
{ .compatible = "nvidia,tegra20-gr2d", .data = &tegra20_gr2d_soc },
{ },
};
MODULE_DEVICE_TABLE(of, gr2d_match);

2
drivers/gpu/drm/tegra/hdmi.c
View File

@ -1510,7 +1510,7 @@ static int tegra_hdmi_runtime_resume(struct host1x_client *client)
struct device *dev = client->dev;
int err;
err = pm_runtime_get_sync(dev);
err = pm_runtime_resume_and_get(dev);
if (err < 0) {
dev_err(dev, "failed to get runtime PM: %d\n", err);
return err;

2
drivers/gpu/drm/tegra/hub.c
View File

@ -789,7 +789,7 @@ static int tegra_display_hub_runtime_resume(struct host1x_client *client)
unsigned int i;
int err;
err = pm_runtime_get_sync(dev);
err = pm_runtime_resume_and_get(dev);
if (err < 0) {
dev_err(dev, "failed to get runtime PM: %d\n", err);
return err;

2
drivers/gpu/drm/tegra/sor.c
View File

@ -3218,7 +3218,7 @@ static int tegra_sor_runtime_resume(struct host1x_client *client)
struct device *dev = client->dev;
int err;
err = pm_runtime_get_sync(dev);
err = pm_runtime_resume_and_get(dev);
if (err < 0) {
dev_err(dev, "failed to get runtime PM: %d\n", err);
return err;

35
drivers/gpu/drm/tegra/vic.c
View File

@ -117,7 +117,19 @@ static int vic_boot(struct vic *vic)
if (spec->num_ids > 0) {
value = spec->ids[0] & 0xffff;
/*
* STREAMID0 is used for input/output buffers.
* Initialize it to SID_VIC in case context isolation
* is not enabled, and SID_VIC is used for both firmware
* and data buffers.
*
* If context isolation is enabled, it will be
* overridden by the SETSTREAMID opcode as part of
* each job.
*/
vic_writel(vic, value, VIC_THI_STREAMID0);
/* STREAMID1 is used for firmware loading. */
vic_writel(vic, value, VIC_THI_STREAMID1);
}
}
@ -135,16 +147,21 @@ static int vic_boot(struct vic *vic)
hdr = vic->falcon.firmware.virt;
fce_bin_data_offset = *(u32 *)(hdr + VIC_UCODE_FCE_DATA_OFFSET);
hdr = vic->falcon.firmware.virt +
*(u32 *)(hdr + VIC_UCODE_FCE_HEADER_OFFSET);
fce_ucode_size = *(u32 *)(hdr + FCE_UCODE_SIZE_OFFSET);
falcon_execute_method(&vic->falcon, VIC_SET_APPLICATION_ID, 1);
falcon_execute_method(&vic->falcon, VIC_SET_FCE_UCODE_SIZE,
fce_ucode_size);
falcon_execute_method(&vic->falcon, VIC_SET_FCE_UCODE_OFFSET,
(vic->falcon.firmware.iova + fce_bin_data_offset)
>> 8);
/* Old VIC firmware needs kernel help with setting up FCE microcode. */
if (fce_bin_data_offset != 0x0 && fce_bin_data_offset != 0xa5a5a5a5) {
hdr = vic->falcon.firmware.virt +
*(u32 *)(hdr + VIC_UCODE_FCE_HEADER_OFFSET);
fce_ucode_size = *(u32 *)(hdr + FCE_UCODE_SIZE_OFFSET);
falcon_execute_method(&vic->falcon, VIC_SET_FCE_UCODE_SIZE,
fce_ucode_size);
falcon_execute_method(
&vic->falcon, VIC_SET_FCE_UCODE_OFFSET,
(vic->falcon.firmware.iova + fce_bin_data_offset) >> 8);
}
err = falcon_wait_idle(&vic->falcon);
if (err < 0) {
@ -314,7 +331,7 @@ static int vic_open_channel(struct tegra_drm_client *client,
struct vic *vic = to_vic(client);
int err;
err = pm_runtime_get_sync(vic->dev);
err = pm_runtime_resume_and_get(vic->dev);
if (err < 0)
return err;