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dt-bindings: phy: qcom: Fix missing 'ranges' and example addresses

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The QCom QMP PHY bindings have child nodes with translatable (MMIO)
addresses, so a 'ranges' property is required in the parent node.
Additionally, the examples default to 1 address and size cell, so let's
fix that, too.

Fixes: ccf51c1ced ("dt-bindings: phy: qcom,qmp: Convert QMP PHY bindings to yaml")
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Manu Gautam <mgautam@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Rob Herring 2020-06-11 08:52:38 -06:00
parent 086e9074f5
commit c0eca14c57
2 changed files with 33 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
View File

@ -44,6 +44,8 @@ properties:
"#size-cells":
enum: [ 1, 2 ]
ranges: true
clocks:
minItems: 1
maxItems: 4
@ -87,6 +89,7 @@ required:
- "#clock-cells"
- "#address-cells"
- "#size-cells"
- ranges
- clocks
- clock-names
- resets
@ -281,10 +284,11 @@ examples:
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
usb_2_qmpphy: phy-wrapper@88eb000 {
compatible = "qcom,sdm845-qmp-usb3-uni-phy";
reg = <0 0x088eb000 0 0x18c>;
reg = <0x088eb000 0x18c>;
#clock-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x088eb000 0x2000>;
clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >,
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
@ -299,11 +303,11 @@ examples:
vdda-phy-supply = <&vdda_usb2_ss_1p2>;
vdda-pll-supply = <&vdda_usb2_ss_core>;
usb_2_ssphy: phy@88eb200 {
reg = <0 0x088eb200 0 0x128>,
<0 0x088eb400 0 0x1fc>,
<0 0x088eb800 0 0x218>,
<0 0x088eb600 0 0x70>;
usb_2_ssphy: phy@200 {
reg = <0x200 0x128>,
<0x400 0x1fc>,
<0x800 0x218>,
<0x600 0x70>;
#clock-cells = <0>;
#phy-cells = <0>;
clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;

38
Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml
View File

@ -34,6 +34,8 @@ properties:
"#size-cells":
enum: [ 1, 2 ]
ranges: true
clocks:
items:
- description: Phy aux clock.
@ -86,6 +88,7 @@ required:
- "#clock-cells"
- "#address-cells"
- "#size-cells"
- ranges
- clocks
- clock-names
- resets
@ -100,12 +103,13 @@ examples:
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
usb_1_qmpphy: phy-wrapper@88e9000 {
compatible = "qcom,sdm845-qmp-usb3-phy";
reg = <0 0x088e9000 0 0x18c>,
<0 0x088e8000 0 0x10>;
reg = <0x088e9000 0x18c>,
<0x088e8000 0x10>;
reg-names = "reg-base", "dp_com";
#clock-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x088e9000 0x1000>;
clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
@ -120,17 +124,17 @@ examples:
vdda-phy-supply = <&vdda_usb2_ss_1p2>;
vdda-pll-supply = <&vdda_usb2_ss_core>;
usb_1_ssphy: phy@88e9200 {
reg = <0 0x088e9200 0 0x128>,
<0 0x088e9400 0 0x200>,
<0 0x088e9c00 0 0x218>,
<0 0x088e9600 0 0x128>,
<0 0x088e9800 0 0x200>,
<0 0x088e9a00 0 0x100>;
#clock-cells = <0>;
#phy-cells = <0>;
clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "usb3_phy_pipe_clk_src";
};
phy@200 {
reg = <0x200 0x128>,
<0x400 0x200>,
<0xc00 0x218>,
<0x600 0x128>,
<0x800 0x200>,
<0xa00 0x100>;
#clock-cells = <0>;
#phy-cells = <0>;
clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "usb3_phy_pipe_clk_src";
};
};