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ARM: dts: am335x-icev2: Add CPSW ethernet0 and ethernet1
Enable the 2 ethernet ports as CPSW ports in dual-mac mode Signed-off-by: Roger Quadros <rogerq@ti.com> [nsekhar@ti.com: use AM33XX_IOPAD()] Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -201,6 +201,69 @@
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AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLUP | MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
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>;
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};
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1, RMII mode */
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AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_crs.rmii1_crs_dv */
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AM33XX_IOPAD(0x944, (PIN_INPUT_PULLUP | MUX_MODE0)) /* rmii1_refclk.rmii1_refclk */
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AM33XX_IOPAD(0x940, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd0.rmii1_rxd0 */
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AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd1.rmii1_rxd1 */
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AM33XX_IOPAD(0x910, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxerr.rmii1_rxerr */
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AM33XX_IOPAD(0x928, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd0.rmii1_txd0 */
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AM33XX_IOPAD(0x924, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd1.rmii1_txd1 */
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AM33XX_IOPAD(0x914, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txen.rmii1_txen */
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/* Slave 2, RMII mode */
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AM33XX_IOPAD(0x870, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wait0.rmii2_crs_dv */
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AM33XX_IOPAD(0x908, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_col.rmii2_refclk */
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AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a11.rmii2_rxd0 */
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AM33XX_IOPAD(0x868, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a10.rmii2_rxd1 */
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AM33XX_IOPAD(0x874, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wpn.rmii2_rxerr */
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AM33XX_IOPAD(0x854, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a5.rmii2_txd0 */
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AM33XX_IOPAD(0x850, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a4.rmii2_txd1 */
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AM33XX_IOPAD(0x840, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a0.rmii2_txen */
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>;
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};
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cpsw_sleep: cpsw_sleep {
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pinctrl-single,pins = <
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/* Slave 1 reset value */
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AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x944, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x940, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x910, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x928, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x924, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x914, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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/* Slave 2 reset value */
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AM33XX_IOPAD(0x870, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x908, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x868, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x874, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x854, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x850, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x840, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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/* MDIO */
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AM33XX_IOPAD(0x948, (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)) /* mdio_data.mdio_data */
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AM33XX_IOPAD(0x94c, (PIN_OUTPUT_PULLUP | MUX_MODE0)) /* mdio_clk.mdio_clk */
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>;
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};
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davinci_mdio_sleep: davinci_mdio_sleep {
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pinctrl-single,pins = <
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/* MDIO reset value */
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AM33XX_IOPAD(0x948, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x94c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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>;
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};
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};
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&i2c0 {
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@ -383,3 +446,61 @@
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pinctrl-0 = <&uart3_pins_default>;
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status = "okay";
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};
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&gpio3 {
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p4 {
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gpio-hog;
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gpios = <4 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "PR1_MII_CTRL";
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};
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p10 {
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gpio-hog;
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gpios = <10 GPIO_ACTIVE_HIGH>;
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/* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
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output-high;
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line-name = "MUX_MII_CTL1";
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};
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};
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&cpsw_emac0 {
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phy-handle = <ðphy0>;
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phy-mode = "rmii";
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dual_emac_res_vlan = <1>;
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};
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&cpsw_emac1 {
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phy-handle = <ðphy1>;
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phy-mode = "rmii";
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dual_emac_res_vlan = <2>;
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};
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&mac {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&cpsw_default>;
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pinctrl-1 = <&cpsw_sleep>;
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status = "okay";
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dual_emac;
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};
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&phy_sel {
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rmii-clock-ext;
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};
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&davinci_mdio {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&davinci_mdio_default>;
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pinctrl-1 = <&davinci_mdio_sleep>;
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status = "okay";
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reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
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reset-delay-us = <2>; /* PHY datasheet states 1uS min */
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ethphy0: ethernet-phy@1 {
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reg = <1>;
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};
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ethphy1: ethernet-phy@3 {
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reg = <3>;
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};
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};
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