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PCI: designware: Use exact access size in dw_pcie_cfg_read()

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dw_pcie_cfg_write() uses the exact 8-, 16-, or 32-bit access size
requested, but dw_pcie_cfg_read() previously performed a 32-bit read and
masked out the bits requested.

Use the exact access size in dw_pcie_cfg_read().  For example, if we want
an 8-bit read, use readb() instead of using readl() and masking out the 8
bits we need.  This makes it symmetric with dw_pcie_cfg_write().

[bhelgaas: split into separate patch, set *val = 0 in failure case]
Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Gabriele Paoloni 2015-10-08 14:27:43 -05:00 committed by Bjorn Helgaas
parent fa3b7cbab5
commit c003ca9963
1 changed files with 8 additions and 6 deletions
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12
drivers/pci/host/pcie-designware.c
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@ -82,14 +82,16 @@ static inline struct pcie_port *sys_to_pcie(struct pci_sys_data *sys)
int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val) int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val)
{ {
if (size == 4)
*val = readl(addr); *val = readl(addr);
if (size == 1)
*val = (*val >> (8 * (where & 3))) & 0xff;
else if (size == 2) else if (size == 2)
*val = (*val >> (8 * (where & 3))) & 0xffff; *val = readw(addr + (where & 2));
else if (size != 4) else if (size == 1)
*val = readb(addr + (where & 1));
else {
*val = 0;
return PCIBIOS_BAD_REGISTER_NUMBER; return PCIBIOS_BAD_REGISTER_NUMBER;
}
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
} }