From bff8fba48b52d77b39084743b6209b6442a9e622 Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Fri, 16 Dec 2016 12:00:30 +0530 Subject: [PATCH] drm/msm/mdp5: Add cursor planes Register cursor drm_planes. The loop in modeset_init that inits the planes and crtcs has to be refactored a bit. We first iterate all the hwpipes to find the cursor planes. Then, we loop again to create crtcs. In msm_atomic_wait_for_commit_done, remove the check which bypasses waiting for vsyncs if state->legacy_cursor_updates is true. We will later create a fast path for cursor position changes in the cursor plane's update_plane func that doesn't go via the regular atomic commit path. For rest of cursor related updates, we will have to wait for vsyncs, so ignore the legacy_cursor_updates flag. Signed-off-by: Archit Taneja Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 33 +++++++++++++++++++------ drivers/gpu/drm/msm/msm_atomic.c | 5 ---- 2 files changed, 26 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c index 70a1950de8ae..3eb0749223d9 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c @@ -411,7 +411,9 @@ static int modeset_init(struct mdp5_kms *mdp5_kms) struct msm_drm_private *priv = dev->dev_private; const struct mdp5_cfg_hw *hw_cfg; unsigned int num_crtcs; - int i, ret; + int i, ret, pi = 0, ci = 0; + struct drm_plane *primary[MAX_BASES] = { NULL }; + struct drm_plane *cursor[MAX_BASES] = { NULL }; hw_cfg = mdp5_cfg_get_hw_config(mdp5_kms->cfg); @@ -438,13 +440,14 @@ static int modeset_init(struct mdp5_kms *mdp5_kms) * planes for the CRTCs, with the remainder as overlay planes: */ for (i = 0; i < mdp5_kms->num_hwpipes; i++) { - bool primary = i < num_crtcs; + struct mdp5_hw_pipe *hwpipe = mdp5_kms->hwpipes[i]; struct drm_plane *plane; - struct drm_crtc *crtc; enum drm_plane_type type; - if (primary) + if (i < num_crtcs) type = DRM_PLANE_TYPE_PRIMARY; + else if (hwpipe->caps & MDP_PIPE_CAP_CURSOR) + type = DRM_PLANE_TYPE_CURSOR; else type = DRM_PLANE_TYPE_OVERLAY; @@ -456,10 +459,16 @@ static int modeset_init(struct mdp5_kms *mdp5_kms) } priv->planes[priv->num_planes++] = plane; - if (!primary) - continue; + if (type == DRM_PLANE_TYPE_PRIMARY) + primary[pi++] = plane; + if (type == DRM_PLANE_TYPE_CURSOR) + cursor[ci++] = plane; + } - crtc = mdp5_crtc_init(dev, plane, NULL, i); + for (i = 0; i < num_crtcs; i++) { + struct drm_crtc *crtc; + + crtc = mdp5_crtc_init(dev, primary[i], cursor[i], i); if (IS_ERR(crtc)) { ret = PTR_ERR(crtc); dev_err(dev->dev, "failed to construct crtc %d (%d)\n", i, ret); @@ -791,6 +800,9 @@ static int hwpipe_init(struct mdp5_kms *mdp5_kms) static const enum mdp5_pipe dma_planes[] = { SSPP_DMA0, SSPP_DMA1, }; + static const enum mdp5_pipe cursor_planes[] = { + SSPP_CURSOR0, SSPP_CURSOR1, + }; const struct mdp5_cfg_hw *hw_cfg; int ret; @@ -814,6 +826,13 @@ static int hwpipe_init(struct mdp5_kms *mdp5_kms) if (ret) return ret; + /* Construct cursor pipes: */ + ret = construct_pipes(mdp5_kms, hw_cfg->pipe_cursor.count, + cursor_planes, hw_cfg->pipe_cursor.base, + hw_cfg->pipe_cursor.caps); + if (ret) + return ret; + return 0; } diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c index 6924fa28f04f..9633a68b14d7 100644 --- a/drivers/gpu/drm/msm/msm_atomic.c +++ b/drivers/gpu/drm/msm/msm_atomic.c @@ -93,11 +93,6 @@ static void msm_atomic_wait_for_commit_done(struct drm_device *dev, if (!crtc->state->enable) continue; - /* Legacy cursor ioctls are completely unsynced, and userspace - * relies on that (by doing tons of cursor updates). */ - if (old_state->legacy_cursor_update) - continue; - kms->funcs->wait_for_crtc_commit_done(kms, crtc); } }