From bf64f7fe151b9568443c9b0cf643b3542d36870c Mon Sep 17 00:00:00 2001 From: Jackie Liu Date: Wed, 30 Mar 2022 20:09:21 +0800 Subject: [PATCH] MIPS: rb532: move GPIOD definition into C-files MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit My kernel robot reports build error from drivers/iio/adc/da9150-gpadc.c, drivers/iio/adc/da9150-gpadc.c:254:13: error: ‘DA9150_GPADC_CHAN_0x08’ undeclared here (not in a function); did you mean ‘DA9150_GPADC_CHAN_TBAT’? 254 | .channel = DA9150_GPADC_CHAN_##_id, We define GPIOD in rb.h, in fact it should only be used in gpio.c, but it affects the driver da9150-gpadc.c which goes against the original intention of the design, just move it to its scope. Fixes: 1b432840d0a4 ("MIPS: RB532: GPIO register offsets are relative to GPIOBASE") Suggested-by: Jonathan Cameron Suggested-by: Andy Shevchenko Reported-by: k2ci Signed-off-by: Jackie Liu Signed-off-by: Thomas Bogendoerfer --- arch/mips/include/asm/mach-rc32434/rb.h | 9 --------- arch/mips/rb532/gpio.c | 10 ++++++++++ 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/arch/mips/include/asm/mach-rc32434/rb.h b/arch/mips/include/asm/mach-rc32434/rb.h index 34d179ca020b..dd9d4b026e62 100644 --- a/arch/mips/include/asm/mach-rc32434/rb.h +++ b/arch/mips/include/asm/mach-rc32434/rb.h @@ -29,15 +29,6 @@ #define DEV3TC 0x01003C #define BTCS 0x010040 #define BTCOMPARE 0x010044 -#define GPIOBASE 0x050000 -/* Offsets relative to GPIOBASE */ -#define GPIOFUNC 0x00 -#define GPIOCFG 0x04 -#define GPIOD 0x08 -#define GPIOILEVEL 0x0C -#define GPIOISTAT 0x10 -#define GPIONMIEN 0x14 -#define IMASK6 0x38 #define LO_WPX (1 << 0) #define LO_ALE (1 << 1) #define LO_CLE (1 << 2) diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index 94f02ada4082..29c21b9d42da 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -37,6 +37,16 @@ #include #include +#define GPIOBASE 0x050000 +/* Offsets relative to GPIOBASE */ +#define GPIOFUNC 0x00 +#define GPIOCFG 0x04 +#define GPIOD 0x08 +#define GPIOILEVEL 0x0C +#define GPIOISTAT 0x10 +#define GPIONMIEN 0x14 +#define IMASK6 0x38 + struct rb532_gpio_chip { struct gpio_chip chip; void __iomem *regbase;